{"id":"https://openalex.org/W2128046183","doi":"https://doi.org/10.1145/1854273.1854318","title":"Ocelot","display_name":"Ocelot","publication_year":2010,"publication_date":"2010-09-11","ids":{"openalex":"https://openalex.org/W2128046183","doi":"https://doi.org/10.1145/1854273.1854318","mag":"2128046183"},"language":"en","primary_location":{"id":"doi:10.1145/1854273.1854318","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1854273.1854318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th international conference on Parallel architectures and compilation techniques","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006631932","display_name":"Gregory Diamos","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Gregory Frederick Diamos","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, 30332-0250, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, 30332-0250, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102856962","display_name":"Andrew Kerr","orcid":"https://orcid.org/0009-0003-5708-0216"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew Robert Kerr","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, 30332-0250, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, 30332-0250, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111855694","display_name":"Sudhakar Yalamanchili","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhakar Yalamanchili","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, 30332-0250, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, 30332-0250, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021259549","display_name":"Nathan Clark","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nathan Clark","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA, USA","College of Computing, Georgia Institute of Technology, Atlanta, 30332-0250, USA"],"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"College of Computing, Georgia Institute of Technology, Atlanta, 30332-0250, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5006631932"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":25.2184,"has_fulltext":false,"cited_by_count":214,"citation_normalized_percentile":{"value":0.99720536,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"353","last_page":"364"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8904998302459717},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.797499418258667},{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.6805944442749023},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6290298700332642},{"id":"https://openalex.org/keywords/binary-translation","display_name":"Binary translation","score":0.619976282119751},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6079107522964478},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5473476052284241},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.49280980229377747},{"id":"https://openalex.org/keywords/just-in-time-compilation","display_name":"Just-in-time compilation","score":0.41175544261932373},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.19725683331489563}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8904998302459717},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.797499418258667},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.6805944442749023},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6290298700332642},{"id":"https://openalex.org/C2778971978","wikidata":"https://www.wikidata.org/wiki/Q2287075","display_name":"Binary translation","level":3,"score":0.619976282119751},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6079107522964478},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5473476052284241},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.49280980229377747},{"id":"https://openalex.org/C76782552","wikidata":"https://www.wikidata.org/wiki/Q110546","display_name":"Just-in-time compilation","level":3,"score":0.41175544261932373},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.19725683331489563}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1854273.1854318","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1854273.1854318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th international conference on Parallel architectures and compilation techniques","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W23394342","https://openalex.org/W1579925828","https://openalex.org/W1979527452","https://openalex.org/W1989773959","https://openalex.org/W2010802738","https://openalex.org/W2045271686","https://openalex.org/W2072737419","https://openalex.org/W2080592089","https://openalex.org/W2085118703","https://openalex.org/W2086551443","https://openalex.org/W2099084006","https://openalex.org/W2099891946","https://openalex.org/W2124556751","https://openalex.org/W2138547938","https://openalex.org/W2146766856","https://openalex.org/W2148865465","https://openalex.org/W2149693551","https://openalex.org/W2150476673","https://openalex.org/W2153185479","https://openalex.org/W2156858199","https://openalex.org/W2157277188","https://openalex.org/W2169880332","https://openalex.org/W2507749557","https://openalex.org/W2535372506","https://openalex.org/W4231002400","https://openalex.org/W4239035626"],"related_works":["https://openalex.org/W1964586167","https://openalex.org/W2369102298","https://openalex.org/W2766777357","https://openalex.org/W3005677086","https://openalex.org/W2312672192","https://openalex.org/W2911551207","https://openalex.org/W2479669872","https://openalex.org/W2166847391","https://openalex.org/W2120142281","https://openalex.org/W2132071463"],"abstract_inverted_index":{"Ocelot":[0,24],"is":[1,58],"a":[2,26,79],"dynamic":[3,27,56],"compilation":[4],"framework":[5],"designed":[6],"to":[7,36,49,60],"map":[8],"the":[9,41,94,97,102,107,115],"explicitly":[10],"data":[11],"parallel":[12],"execution":[13,73],"model":[14],"used":[15],"by":[16],"NVIDIA":[17,76],"CUDA":[18,63,95],"applications":[19,91],"onto":[20],"diverse":[21],"multithreaded":[22],"platforms.":[23],"includes":[25],"binary":[28],"translator":[29],"from":[30,67,93],"Parallel":[31],"Thread":[32],"eXecution":[33],"ISA":[34],"(PTX)":[35],"many-core":[37,80],"processors":[38],"that":[39],"leverages":[40],"Low":[42],"Level":[43],"Virtual":[44],"Machine":[45],"(LLVM)":[46],"code":[47],"generator":[48],"target":[50],"x86":[51],"and":[52,69,78,110,119],"other":[53],"ISAs.":[54],"The":[55],"compiler":[57],"able":[59],"execute":[61],"existing":[62],"binaries":[64],"without":[65],"recompilation":[66],"source":[68],"supports":[70],"switching":[71],"between":[72],"on":[74],"an":[75],"GPU":[77],"CPU":[81],"at":[82],"runtime.":[83],"It":[84],"has":[85],"been":[86],"validated":[87],"against":[88],"over":[89],"130":[90],"taken":[92],"SDK,":[96],"UIUC":[98],"Parboil":[99],"benchmarks":[100,105],"[1],":[101],"Virginia":[103],"Rodinia":[104],"[2],":[106],"GPU-VSIPL":[108],"signal":[109],"image":[111],"processing":[112],"library":[113,117],"[3],":[114],"Thrust":[116],"[4],":[118],"several":[120],"domain":[121],"specific":[122],"applications.":[123]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":9},{"year":2018,"cited_by_count":10},{"year":2017,"cited_by_count":10},{"year":2016,"cited_by_count":16},{"year":2015,"cited_by_count":19},{"year":2014,"cited_by_count":23},{"year":2013,"cited_by_count":39},{"year":2012,"cited_by_count":37}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}