{"id":"https://openalex.org/W2051000336","doi":"https://doi.org/10.1145/1854153.1854166","title":"Design methodology using inversion coefficient for low-voltage low-power CMOS voltage reference","display_name":"Design methodology using inversion coefficient for low-voltage low-power CMOS voltage reference","publication_year":2010,"publication_date":"2010-09-06","ids":{"openalex":"https://openalex.org/W2051000336","doi":"https://doi.org/10.1145/1854153.1854166","mag":"2051000336"},"language":"en","primary_location":{"id":"doi:10.1145/1854153.1854166","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1854153.1854166","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd symposium on Integrated circuits and system design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007221100","display_name":"Dalton Martini Colombo","orcid":"https://orcid.org/0000-0002-6781-9673"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Dalton Martini Colombo","raw_affiliation_strings":["UFRGS, Porto Alegre, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022015482","display_name":"Gilson Wirth","orcid":"https://orcid.org/0000-0002-4990-5113"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Gilson Inacio Wirth","raw_affiliation_strings":["UFRGS, Porto Alegre, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055844451","display_name":"Christian Fayomi","orcid":null},"institutions":[{"id":"https://openalex.org/I159129438","display_name":"Universit\u00e9 du Qu\u00e9bec \u00e0 Montr\u00e9al","ror":"https://ror.org/002rjbv21","country_code":"CA","type":"education","lineage":["https://openalex.org/I159129438","https://openalex.org/I49663120"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Christian Fayomi","raw_affiliation_strings":["UQAM, Montreal, PQ, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UQAM, Montreal, PQ, Canada","institution_ids":["https://openalex.org/I159129438"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.9124,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.9527868,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"43","last_page":"48"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.7636505961418152},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6864209175109863},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5878776907920837},{"id":"https://openalex.org/keywords/overdrive-voltage","display_name":"Overdrive voltage","score":0.5738714933395386},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.48920750617980957},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47741544246673584},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.4636671841144562},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.45882463455200195},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.4420351982116699},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4342958927154541},{"id":"https://openalex.org/keywords/inversion","display_name":"Inversion (geology)","score":0.4204743504524231},{"id":"https://openalex.org/keywords/voltage-reduction","display_name":"Voltage reduction","score":0.41576266288757324},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.407511830329895},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.37018293142318726},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2967711091041565}],"concepts":[{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.7636505961418152},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6864209175109863},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5878776907920837},{"id":"https://openalex.org/C195905723","wikidata":"https://www.wikidata.org/wiki/Q7113634","display_name":"Overdrive voltage","level":5,"score":0.5738714933395386},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48920750617980957},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47741544246673584},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.4636671841144562},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.45882463455200195},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.4420351982116699},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4342958927154541},{"id":"https://openalex.org/C1893757","wikidata":"https://www.wikidata.org/wiki/Q3653001","display_name":"Inversion (geology)","level":3,"score":0.4204743504524231},{"id":"https://openalex.org/C2780745134","wikidata":"https://www.wikidata.org/wiki/Q7940751","display_name":"Voltage reduction","level":3,"score":0.41576266288757324},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.407511830329895},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.37018293142318726},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2967711091041565},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C109007969","wikidata":"https://www.wikidata.org/wiki/Q749565","display_name":"Structural basin","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1854153.1854166","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1854153.1854166","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd symposium on Integrated circuits and system design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6800000071525574}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321091","display_name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior","ror":"https://ror.org/00x0ma614"},{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1553673400","https://openalex.org/W2092954710","https://openalex.org/W2111691719","https://openalex.org/W2122965295","https://openalex.org/W2129742172","https://openalex.org/W2133201500","https://openalex.org/W2171702041","https://openalex.org/W2532797637","https://openalex.org/W4229941912"],"related_works":["https://openalex.org/W2348464439","https://openalex.org/W2038852706","https://openalex.org/W3113655337","https://openalex.org/W3196410233","https://openalex.org/W3106621756","https://openalex.org/W2367229640","https://openalex.org/W2163386767","https://openalex.org/W2082483079","https://openalex.org/W2055167838","https://openalex.org/W2582608101"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"analog":[4,39],"design":[5,17,40,68,75],"methodology,":[6],"using":[7],"the":[8,44,58,64,72,84],"selection":[9],"of":[10,13,47,57,74,80,104],"inversion":[11],"coefficient":[12],"MOS":[14],"devices,":[15],"to":[16,67],"low":[18],"voltage":[19,24,95,103],"and":[20,52,78],"low-power":[21],"(LVLP)":[22],"CMOS":[23,111],"references.":[25],"These":[26],"circuits":[27,69],"often":[28],"work":[29],"under":[30],"subthreshold":[31,99],"operation.":[32],"Hence,":[33],"there":[34],"is":[35,71],"a":[36,90,93],"demand":[37],"for":[38,109],"methods":[41],"that":[42],"optimize":[43],"sizing":[45],"process":[46],"transistors":[48],"working":[49],"in":[50],"weak":[51],"moderate":[53],"inversion.":[54],"The":[55],"advantage":[56],"presented":[59],"method":[60],"--":[61,70],"compared":[62],"with":[63,101],"traditional":[65],"approach":[66],"reduction":[73],"cycle":[76],"time":[77],"minimization":[79],"trial-and-error":[81],"simulations,":[82],"if":[83],"proposed":[85],"equations":[86],"are":[87],"used.":[88],"As":[89],"case":[91],"study,":[92],"LVLP":[94],"reference":[96],"based":[97],"on":[98],"MOSFETs":[100],"supply":[102],"0.7":[105],"V":[106],"was":[107],"designed":[108],"0.18-\u00bcm":[110],"technology.":[112]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
