{"id":"https://openalex.org/W2068607560","doi":"https://doi.org/10.1145/1850771.1850787","title":"Investigating hardware micro-instruction folding in a Java embedded processor","display_name":"Investigating hardware micro-instruction folding in a Java embedded processor","publication_year":2010,"publication_date":"2010-08-19","ids":{"openalex":"https://openalex.org/W2068607560","doi":"https://doi.org/10.1145/1850771.1850787","mag":"2068607560"},"language":"en","primary_location":{"id":"doi:10.1145/1850771.1850787","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1850771.1850787","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076838369","display_name":"Flavius Gruian","orcid":"https://orcid.org/0000-0003-1739-3384"},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Flavius Gruian","raw_affiliation_strings":["Lund University, Sweden","Lund Univ., Sweden#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lund University, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"Lund Univ., Sweden#TAB#","institution_ids":["https://openalex.org/I187531555"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024851547","display_name":"Mark Westmijze","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Mark Westmijze","raw_affiliation_strings":["University of Twente, The Netherlands","University of Twente, The Netherlands,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Twente, The Netherlands","institution_ids":["https://openalex.org/I94624287"]},{"raw_affiliation_string":"University of Twente, The Netherlands,","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.526,"has_fulltext":true,"cited_by_count":7,"citation_normalized_percentile":{"value":0.60990136,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"102","last_page":"108"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8325624465942383},{"id":"https://openalex.org/keywords/folding","display_name":"Folding (DSP implementation)","score":0.734997570514679},{"id":"https://openalex.org/keywords/bytecode","display_name":"Bytecode","score":0.7045140266418457},{"id":"https://openalex.org/keywords/java","display_name":"Java","score":0.637965202331543},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5340090990066528},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5048292279243469},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3988778591156006},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39396777749061584},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34918826818466187},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25929176807403564}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8325624465942383},{"id":"https://openalex.org/C2776545253","wikidata":"https://www.wikidata.org/wiki/Q5464292","display_name":"Folding (DSP implementation)","level":2,"score":0.734997570514679},{"id":"https://openalex.org/C2779818221","wikidata":"https://www.wikidata.org/wiki/Q837330","display_name":"Bytecode","level":3,"score":0.7045140266418457},{"id":"https://openalex.org/C548217200","wikidata":"https://www.wikidata.org/wiki/Q251","display_name":"Java","level":2,"score":0.637965202331543},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5340090990066528},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5048292279243469},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3988778591156006},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39396777749061584},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34918826818466187},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25929176807403564},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1850771.1850787","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1850771.1850787","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:lup.lub.lu.se:ee4a67c1-d8da-450f-b298-380483187d9d","is_oa":false,"landing_page_url":"https://lup.lub.lu.se/record/1660561","pdf_url":null,"source":{"id":"https://openalex.org/S4306400536","display_name":"Lund University Publications (Lund University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I187531555","host_organization_name":"Lund University","host_organization_lineage":["https://openalex.org/I187531555"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W65216360","https://openalex.org/W145678023","https://openalex.org/W1521915012","https://openalex.org/W1986314250","https://openalex.org/W2014663396","https://openalex.org/W2027331107","https://openalex.org/W2035556370","https://openalex.org/W2066744234","https://openalex.org/W2083949651","https://openalex.org/W2087348890","https://openalex.org/W2096136947","https://openalex.org/W2123694710","https://openalex.org/W2159303290","https://openalex.org/W2526085150","https://openalex.org/W4205750364"],"related_works":["https://openalex.org/W1889284597","https://openalex.org/W20625830","https://openalex.org/W4379620208","https://openalex.org/W3100733828","https://openalex.org/W2128389850","https://openalex.org/W2100791882","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160474882"],"abstract_inverted_index":{"Bytecode":[0],"folding":[1,43,65,126],"is":[2,32,88],"an":[3],"effective":[4],"technique":[5,23],"for":[6,61,108],"speeding":[7],"up":[8,44,50],"execution":[9,86],"in":[10],"Java":[11,27],"virtual":[12],"machines.":[13],"This":[14],"paper":[15],"investigates":[16],"a":[17,26,33,39,73,96,112,134],"hardware":[18,119],"implementation":[19],"of":[20,58,64,85,147],"the":[21,83,90,102,144,148],"aforementioned":[22],"on":[24,54,72,133],"BlueJEP,":[25],"embedded":[28],"processor.":[29],"Since":[30],"BlueJEP":[31],"micro-programmed":[34],"stack":[35],"machine,":[36],"we":[37,105,123],"adopt":[38],"micro-instruction":[40],"oriented":[41],"approach,":[42],"to":[45,49,51,95,143],"four":[46,52],"microinstructions":[47],"(corresponding":[48],"bytecodes,":[53],"occasion).":[55],"A":[56],"variety":[57],"processor":[59,114],"versions":[60],"different":[62],"subsets":[63],"patterns":[66],"are":[67],"implemented,":[68],"simulated":[69],"and":[70,78],"synthesized":[71],"Xilinx":[74],"FPGA.":[75],"The":[76],"measurements":[77],"results":[79],"show":[80],"that,":[81],"although":[82],"number":[84],"cycles":[87],"reduced,":[89],"critical":[91],"path":[92],"increase":[93],"leads":[94],"lower":[97],"performance.":[98],"Taking":[99],"into":[100],"account":[101],"device":[103],"area,":[104],"conclude":[106],"that":[107,125],"our":[109],"case,":[110],"adding":[111],"second":[113],"may":[115,128],"be":[116,130],"preferred":[117],"over":[118],"folding.":[120],"In":[121],"general,":[122],"observe":[124],"efficiency":[127],"only":[129],"evaluated":[131],"properly":[132],"real":[135],"implementation,":[136],"rather":[137],"than":[138],"using":[139],"theoretical":[140],"estimates,":[141],"due":[142],"increased":[145],"complexity":[146],"hardware.":[149]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-08-01T09:00:35.917206","created_date":"2025-10-10T00:00:00"}
