{"id":"https://openalex.org/W2028582549","doi":"https://doi.org/10.1145/1837274.1837413","title":"Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation","display_name":"Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation","publication_year":2010,"publication_date":"2010-06-13","ids":{"openalex":"https://openalex.org/W2028582549","doi":"https://doi.org/10.1145/1837274.1837413","mag":"2028582549"},"language":"en","primary_location":{"id":"doi:10.1145/1837274.1837413","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1837274.1837413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 47th Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003123174","display_name":"Xiaoji Ye","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaoji Ye","raw_affiliation_strings":["Texas A&M University, College Station, Texas","Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas, 77843"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University, College Station, Texas","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas, 77843","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100432722","display_name":"Peng Li","orcid":"https://orcid.org/0000-0002-5983-2384"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peng Li","raw_affiliation_strings":["Texas A&M University, College Station, Texas","Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas, 77843"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University, College Station, Texas","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&M University, College Station, Texas, 77843","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.5181,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.83438662,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"561","last_page":"566"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8574955463409424},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6349543333053589},{"id":"https://openalex.org/keywords/modeling-and-simulation","display_name":"Modeling and simulation","score":0.5167807340621948},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.49087458848953247},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.44541409611701965},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.44449153542518616},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4322417378425598},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4020548164844513},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.12525302171707153},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.12166628241539001}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8574955463409424},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6349543333053589},{"id":"https://openalex.org/C167343916","wikidata":"https://www.wikidata.org/wiki/Q6888384","display_name":"Modeling and simulation","level":2,"score":0.5167807340621948},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.49087458848953247},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.44541409611701965},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.44449153542518616},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4322417378425598},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4020548164844513},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.12525302171707153},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.12166628241539001},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1837274.1837413","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1837274.1837413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 47th Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G50450343","display_name":null,"funder_award_id":"2008-HC-1836","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G764710500","display_name":null,"funder_award_id":"CCF-0747423","funder_id":"https://openalex.org/F4320337387","funder_display_name":"Division of Computing and Communication Foundations"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320337387","display_name":"Division of Computing and Communication Foundations","ror":"https://ror.org/01mng8331"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2031235329","https://openalex.org/W2042151827","https://openalex.org/W2042524671","https://openalex.org/W2052839611","https://openalex.org/W2055094346","https://openalex.org/W2075151302","https://openalex.org/W2086202544","https://openalex.org/W2086987027","https://openalex.org/W2090963365","https://openalex.org/W2143006079","https://openalex.org/W2159715864","https://openalex.org/W2169446136","https://openalex.org/W4299512035","https://openalex.org/W6672078216"],"related_works":["https://openalex.org/W1542410906","https://openalex.org/W197049984","https://openalex.org/W1993191611","https://openalex.org/W2023938924","https://openalex.org/W1595672120","https://openalex.org/W4230999561","https://openalex.org/W2918840249","https://openalex.org/W1991859582","https://openalex.org/W2110053126","https://openalex.org/W2316512426"],"abstract_inverted_index":{"With":[0],"the":[1,8,40,46,69,120,164,175,179],"increasing":[2],"popularity":[3],"of":[4,10,23,49,72,86,94,109,122,128,142,167,178],"multi-core":[5],"processors":[6],"and":[7,54,88,101,113,130,145,152,172],"promise":[9],"future":[11],"many-core":[12],"systems,":[13],"parallel":[14,31,51,78,165,180],"CAD":[15],"algorithm":[16,52],"development":[17],"has":[18,35],"attracted":[19],"a":[20,27,56,64,73,92,168],"significant":[21,134],"amount":[22],"research":[24],"effort.":[25],"However,":[26],"highly":[28],"relevant":[29],"issue,":[30],"program":[32],"performance":[33,60,70,111,166],"modeling":[34,44,71,105],"received":[36],"little":[37],"attention":[38],"in":[39,99,107,140],"EDA":[41],"community.":[42],"Performance":[43],"serves":[45],"critical":[47],"role":[48],"guiding":[50],"design":[53],"provides":[55],"basis":[57],"for":[58,68],"runtime":[59,115,176],"optimization.":[61],"We":[62,118,132],"propose":[63],"systematic":[65],"composable":[66],"approach":[67,158],"recently":[74],"developed":[75],"hierarchical":[76],"multi-algorithm":[77],"circuit":[79],"simulation":[80,147,181],"(HMAPS)":[81],"approach.":[82],"The":[83,156],"unique":[84],"integration":[85],"inter-":[87],"intra-algorithm":[89],"parallelisms":[90,95],"allows":[91],"multiplicity":[93],"to":[96,161],"be":[97],"exploited":[98],"HMAPS":[100,170],"also":[102],"creates":[103],"interesting":[104],"challenges":[106],"forms":[108],"complex":[110],"tradeoffs":[112],"large":[114],"configuration":[116,171],"space.":[117],"model":[119],"performances":[121],"key":[123],"subtask":[124],"entities":[125],"as":[126],"functions":[127],"workload":[129],"parallelism.":[131],"address":[133],"complications":[135],"introduced":[136],"by":[137],"inter-algorithm":[138],"interactions":[139],"terms":[141],"memory":[143],"contention":[144],"collaborative":[146],"behavior":[148],"via":[149],"novel":[150],"penalty":[151],"statistical":[153],"based":[154],"modeling.":[155],"proposed":[157],"is":[159],"able":[160],"accurately":[162],"predict":[163],"given":[169],"hence":[173],"enables":[174],"optimization":[177],"code.":[182]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}