{"id":"https://openalex.org/W2043735637","doi":"https://doi.org/10.1145/1837274.1837356","title":"Automatic multithreaded pipeline synthesis from transactional datapath specifications","display_name":"Automatic multithreaded pipeline synthesis from transactional datapath specifications","publication_year":2010,"publication_date":"2010-06-13","ids":{"openalex":"https://openalex.org/W2043735637","doi":"https://doi.org/10.1145/1837274.1837356","mag":"2043735637"},"language":"en","primary_location":{"id":"doi:10.1145/1837274.1837356","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1837274.1837356","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 47th Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084078152","display_name":"Eriko Nurvitadhi","orcid":"https://orcid.org/0000-0002-2347-9590"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eriko Nurvitadhi","raw_affiliation_strings":["Carnegie Mellon University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019376179","display_name":"James C. Hoe","orcid":"https://orcid.org/0000-0002-9302-5287"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James C. Hoe","raw_affiliation_strings":["Carnegie Mellon University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113526607","display_name":"Shih\u2010Lien L. Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shih-Lien L. Lu","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5019748531","display_name":"Timothy Kam","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Timothy Kam","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7591,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.72908922,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"314","last_page":"319"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9275679588317871},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8311283588409424},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.8109555244445801},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6845198273658752},{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.6602288484573364},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5459583401679993},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5447677969932556},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5347719788551331},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.4363098442554474},{"id":"https://openalex.org/keywords/spec#","display_name":"Spec#","score":0.4123136103153229},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.40889713168144226},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3541586101055145},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.16682514548301697},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07411271333694458}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9275679588317871},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8311283588409424},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.8109555244445801},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6845198273658752},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.6602288484573364},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5459583401679993},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5447677969932556},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5347719788551331},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.4363098442554474},{"id":"https://openalex.org/C2778565505","wikidata":"https://www.wikidata.org/wiki/Q2207566","display_name":"Spec#","level":2,"score":0.4123136103153229},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.40889713168144226},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3541586101055145},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.16682514548301697},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07411271333694458},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.0},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1837274.1837356","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1837274.1837356","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 47th Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.454.5360","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.454.5360","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://users.ece.cmu.edu/~jhoe/distribution/2010/dac10.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1612189975","https://openalex.org/W1969772443","https://openalex.org/W2012471639","https://openalex.org/W2025694687","https://openalex.org/W2039217369","https://openalex.org/W2050952165","https://openalex.org/W2096281944","https://openalex.org/W2115541788","https://openalex.org/W2121076909","https://openalex.org/W2123905682","https://openalex.org/W2133088975","https://openalex.org/W2151799560","https://openalex.org/W2157855196","https://openalex.org/W2161038820","https://openalex.org/W2161115325","https://openalex.org/W2164361660","https://openalex.org/W2487430748","https://openalex.org/W2505236094","https://openalex.org/W4245185858","https://openalex.org/W6636322426"],"related_works":["https://openalex.org/W2538455664","https://openalex.org/W2105793606","https://openalex.org/W2417107079","https://openalex.org/W2092304576","https://openalex.org/W2057234250","https://openalex.org/W2148593232","https://openalex.org/W2224753180","https://openalex.org/W2171515050","https://openalex.org/W2996717348","https://openalex.org/W3022562634"],"abstract_inverted_index":{"We":[0,60],"present":[1],"a":[2,7,12,62,76],"technique":[3,31],"to":[4,42],"automatically":[5],"synthesize":[6],"multithreaded":[8,69],"in-order":[9],"pipeline":[10,52],"from":[11,75],"high-level":[13],"unpipelined":[14],"datapath":[15],"specification.":[16],"This":[17],"work":[18],"extends":[19],"the":[20],"previously":[21,49],"proposed":[22,50],"transactional":[23],"specification":[24],"(T-spec)":[25],"and":[26,54],"synthesis":[27],"technology":[28],"(T-piper).":[29],"The":[30],"not":[32],"only":[33],"works":[34],"with":[35,57],"instruction":[36],"processors":[37],"but":[38],"also":[39],"flexible":[40],"enough":[41],"accept":[43],"any":[44],"sequential":[45],"datapath.":[46],"It":[47],"maintains":[48],"non-threaded":[51],"features":[53],"is":[55],"enhanced":[56],"multithreading":[58],"features.":[59],"report":[61],"design":[63],"space":[64],"exploration":[65],"study":[66],"of":[67],"32":[68],"x86":[70],"processor":[71],"pipelines,":[72],"all":[73],"synthesized":[74],"single":[77],"T-spec.":[78]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}