{"id":"https://openalex.org/W2103498248","doi":"https://doi.org/10.1145/1815961.1815973","title":"Reducing cache power with low-cost, multi-bit error-correcting codes","display_name":"Reducing cache power with low-cost, multi-bit error-correcting codes","publication_year":2010,"publication_date":"2010-06-19","ids":{"openalex":"https://openalex.org/W2103498248","doi":"https://doi.org/10.1145/1815961.1815973","mag":"2103498248"},"language":"en","primary_location":{"id":"doi:10.1145/1815961.1815973","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1815961.1815973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 37th annual international symposium on Computer architecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044002903","display_name":"Chris Wilkerson","orcid":"https://orcid.org/0009-0008-8657-2478"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chris Wilkerson","raw_affiliation_strings":["Intel Laboratories, Hillsboro, USA","Intel Laboratories, Hillsboro, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072086494","display_name":"Alaa R. Alameldeen","orcid":"https://orcid.org/0000-0002-9064-4621"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alaa R. Alameldeen","raw_affiliation_strings":["Intel Laboratories, Hillsboro, USA","Intel Laboratories, Hillsboro, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060645023","display_name":"Zeshan Chishti","orcid":"https://orcid.org/0000-0002-1455-4843"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zeshan Chishti","raw_affiliation_strings":["Intel Laboratories, Hillsbor, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Hillsbor, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031436726","display_name":"Wei Wu","orcid":"https://orcid.org/0000-0003-0401-7363"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wei Wu","raw_affiliation_strings":["Intel Laboratories, Hillsboro, USA","Intel Laboratories, Hillsboro, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006467285","display_name":"Dinesh Somasekhar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dinesh Somasekhar","raw_affiliation_strings":["Intel Laboratories, Hillsboro, USA","Intel Laboratories, Hillsboro, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113824454","display_name":"Shih\u2010Lien Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shih-lien Lu","raw_affiliation_strings":["Intel Laboratories, Hillsboro, USA","Intel Laboratories, Hillsboro, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Laboratories, Hillsboro, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5044002903"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":13.3926,"has_fulltext":false,"cited_by_count":198,"citation_normalized_percentile":{"value":0.99069854,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"83","last_page":"93"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7615036964416504},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7015962600708008},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6671129465103149},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5140584707260132},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5101687908172607},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.44120413064956665},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42041391134262085},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.41789913177490234},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3341401219367981},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2884221076965332},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12369942665100098},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11859625577926636}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7615036964416504},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7015962600708008},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6671129465103149},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5140584707260132},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5101687908172607},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.44120413064956665},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42041391134262085},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.41789913177490234},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3341401219367981},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2884221076965332},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12369942665100098},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11859625577926636},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1815961.1815973","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1815961.1815973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 37th annual international symposium on Computer architecture","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.225.8229","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.225.8229","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.wisc.edu/%7Ealaa/papers/isca10_refresh.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.997.747","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.997.747","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eit.lth.se/fileadmin/eit/courses/eit095f/Wilkerson_Cache_Power_J_2010.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320337392","display_name":"Division of Electrical, Communications and Cyber Systems","ror":"https://ror.org/01krpsy48"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W583692503","https://openalex.org/W1533071485","https://openalex.org/W1537824340","https://openalex.org/W1594652978","https://openalex.org/W1909442527","https://openalex.org/W1978703202","https://openalex.org/W1988664198","https://openalex.org/W1998064108","https://openalex.org/W2001894083","https://openalex.org/W2038061869","https://openalex.org/W2042885725","https://openalex.org/W2046773786","https://openalex.org/W2075054028","https://openalex.org/W2077874318","https://openalex.org/W2079163915","https://openalex.org/W2080019739","https://openalex.org/W2096142955","https://openalex.org/W2097538613","https://openalex.org/W2099649318","https://openalex.org/W2104509890","https://openalex.org/W2119435553","https://openalex.org/W2123824917","https://openalex.org/W2124608923","https://openalex.org/W2127478143","https://openalex.org/W2134727012","https://openalex.org/W2134732546","https://openalex.org/W2136819175","https://openalex.org/W2144005128","https://openalex.org/W2157447136","https://openalex.org/W2161197576","https://openalex.org/W2162456729","https://openalex.org/W2171148960","https://openalex.org/W2404664789","https://openalex.org/W2472497014","https://openalex.org/W2537224236","https://openalex.org/W2942537621","https://openalex.org/W3148936090","https://openalex.org/W3150909204","https://openalex.org/W3151122142","https://openalex.org/W4238002809","https://openalex.org/W4285719527","https://openalex.org/W6640063618","https://openalex.org/W6680221981"],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W4401568740","https://openalex.org/W3148568549","https://openalex.org/W2098207691","https://openalex.org/W1648516568","https://openalex.org/W361036515","https://openalex.org/W2161286015","https://openalex.org/W4392590355","https://openalex.org/W2269474412","https://openalex.org/W2081416538"],"abstract_inverted_index":{"Technology":[0],"advancements":[1],"have":[2,127],"enabled":[3],"the":[4,63,76,92,138,152,164,176,180,187],"integration":[5],"of":[6,54,79,95,151,179,189],"large":[7,52,105,183],"on-die":[8],"embedded":[9],"DRAM":[10],"(eDRAM)":[11],"caches.":[12,107],"eDRAM":[13,30,45,106,218],"is":[14,31,65],"significantly":[15,119],"denser":[16],"than":[17],"traditional":[18],"SRAMs,":[19],"but":[20],"must":[21],"be":[22],"periodically":[23],"refreshed":[24],"to":[25,33,70,118,146,174],"retain":[26],"data.":[27],"Like":[28],"SRAM,":[29],"susceptible":[32],"device":[34],"variations,":[35],"which":[36],"play":[37],"a":[38,51,111,128,197,208,216,225,233],"role":[39],"in":[40,212,229],"determining":[41],"refresh":[42,98,121,213,230],"time":[43,99],"for":[44,104,163],"cells.":[46],"Refresh":[47],"power":[48,73,102,214,231],"potentially":[49],"represents":[50],"fraction":[53],"overall":[55],"system":[56,234],"power,":[57],"particularly":[58],"during":[59],"low-power":[60,85],"states":[61],"when":[62,83],"CPU":[64],"idle.":[66],"Future":[67],"designs":[68],"need":[69],"reduce":[71,120],"cache":[72,81,101,153,219],"without":[74,220],"incurring":[75],"high":[77,133],"cost":[78,178,195],"flushing":[80],"data":[82,184],"entering":[84],"states.":[86],"In":[87],"this":[88],"paper,":[89],"we":[90],"show":[91],"significant":[93],"impact":[94],"variations":[96],"on":[97],"and":[100,132,148,224],"consumption":[103],"We":[108],"propose":[109],"Hi-ECC,":[110],"technique":[112],"that":[113,171],"incorporates":[114],"multi-bit":[115,155,190],"error-correcting":[116,124,199],"codes":[117,125,145],"rate.":[122],"Multi-bit":[123],"usually":[126],"complex":[129],"decoder":[130,139],"design":[131],"storage":[134,177,194],"cost.":[135],"Hi-ECC":[136,167],"avoids":[137],"complexity":[140],"by":[141],"using":[142,235],"strong":[143],"ECC":[144],"identify":[147],"disable":[149],"sections":[150],"with":[154],"failures,":[156],"while":[157],"providing":[158,186],"efficient":[159],"single-bit":[160,198],"error":[161,221],"correction":[162,191],"common":[165],"case.":[166],"includes":[168],"additional":[169],"optimizations":[170],"allow":[172],"us":[173],"amortize":[175],"code":[181,201],"over":[182],"words,":[185],"benefit":[188],"at":[192],"same":[193],"as":[196],"(SECDED)":[200],"(2":[202],"%":[203,210,227],"overhead).":[204],"Our":[205],"proposal":[206],"achieves":[207],"93":[209],"reduction":[211,228],"vs.":[215,232],"baseline":[217],"correcting":[222],"capability,":[223],"66":[226],"SECDED":[236],"codes.":[237]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":12},{"year":2018,"cited_by_count":9},{"year":2017,"cited_by_count":16},{"year":2016,"cited_by_count":23},{"year":2015,"cited_by_count":33},{"year":2014,"cited_by_count":31},{"year":2013,"cited_by_count":25},{"year":2012,"cited_by_count":15}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
