{"id":"https://openalex.org/W2171550134","doi":"https://doi.org/10.1145/1815961.1815966","title":"Forwardflow","display_name":"Forwardflow","publication_year":2010,"publication_date":"2010-06-19","ids":{"openalex":"https://openalex.org/W2171550134","doi":"https://doi.org/10.1145/1815961.1815966","mag":"2171550134"},"language":"en","primary_location":{"id":"doi:10.1145/1815961.1815966","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1815961.1815966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 37th annual international symposium on Computer architecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087673469","display_name":"Dan Gibson","orcid":null},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dan Gibson","raw_affiliation_strings":["University of Wisconsin-Madison, Madison, WI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Wisconsin-Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075888890","display_name":"David A. Wood","orcid":"https://orcid.org/0000-0002-9748-8561"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David A. Wood","raw_affiliation_strings":["University of Wisconsin-Madison, Madison, WI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Wisconsin-Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.0483,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.94460967,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"14","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8060997724533081},{"id":"https://openalex.org/keywords/task-parallelism","display_name":"Task parallelism","score":0.7247690558433533},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.6977330446243286},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6010068655014038},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5988497734069824},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.5982995629310608},{"id":"https://openalex.org/keywords/commoditization","display_name":"Commoditization","score":0.5362415313720703},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5255200862884521},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.48088863492012024},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.46596530079841614},{"id":"https://openalex.org/keywords/simultaneous-multithreading","display_name":"Simultaneous multithreading","score":0.46299371123313904},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4344678521156311},{"id":"https://openalex.org/keywords/yarn","display_name":"Yarn","score":0.4264214336872101},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.40350282192230225},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3838025629520416},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07271972298622131}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8060997724533081},{"id":"https://openalex.org/C42992933","wikidata":"https://www.wikidata.org/wiki/Q691169","display_name":"Task parallelism","level":3,"score":0.7247690558433533},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.6977330446243286},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6010068655014038},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5988497734069824},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.5982995629310608},{"id":"https://openalex.org/C165942954","wikidata":"https://www.wikidata.org/wiki/Q5153139","display_name":"Commoditization","level":2,"score":0.5362415313720703},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5255200862884521},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.48088863492012024},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.46596530079841614},{"id":"https://openalex.org/C85717602","wikidata":"https://www.wikidata.org/wiki/Q82178","display_name":"Simultaneous multithreading","level":4,"score":0.46299371123313904},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4344678521156311},{"id":"https://openalex.org/C2778787235","wikidata":"https://www.wikidata.org/wiki/Q49007","display_name":"Yarn","level":2,"score":0.4264214336872101},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.40350282192230225},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3838025629520416},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07271972298622131},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1815961.1815966","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1815961.1815966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 37th annual international symposium on Computer architecture","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7400000095367432}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1490210617","https://openalex.org/W1606011634","https://openalex.org/W1664707389","https://openalex.org/W1991010395","https://openalex.org/W2005646196","https://openalex.org/W2009470771","https://openalex.org/W2019674193","https://openalex.org/W2023997007","https://openalex.org/W2036853599","https://openalex.org/W2079942837","https://openalex.org/W2097346625","https://openalex.org/W2102727118","https://openalex.org/W2105194472","https://openalex.org/W2108039095","https://openalex.org/W2112833506","https://openalex.org/W2118532220","https://openalex.org/W2119160224","https://openalex.org/W2120635877","https://openalex.org/W2123413169","https://openalex.org/W2143032080","https://openalex.org/W2145483435","https://openalex.org/W2149379863","https://openalex.org/W2153331583","https://openalex.org/W2157373341","https://openalex.org/W2160801071","https://openalex.org/W2161864047","https://openalex.org/W2164264749","https://openalex.org/W2167556016","https://openalex.org/W2171532807","https://openalex.org/W2171574202","https://openalex.org/W3137536588","https://openalex.org/W3151280928","https://openalex.org/W4232096869","https://openalex.org/W4234706600"],"related_works":["https://openalex.org/W2101366948","https://openalex.org/W1580653297","https://openalex.org/W1495795513","https://openalex.org/W2169040626","https://openalex.org/W2364546597","https://openalex.org/W2133675875","https://openalex.org/W2149156503","https://openalex.org/W4236721623","https://openalex.org/W2082701182","https://openalex.org/W2042008201"],"abstract_inverted_index":{"Chip":[0],"Multiprocessors":[1],"(CMPs)":[2],"are":[3],"now":[4],"commodity":[5],"hardware,":[6],"but":[7,49],"commoditization":[8],"of":[9,21,30],"parallel":[10,31],"software":[11,32,44],"remains":[12],"elusive.":[13],"In":[14],"the":[15,18,35],"near":[16],"term,":[17],"current":[19],"trend":[20],"increased":[22],"core-per-socket":[23],"count":[24],"will":[25,70],"continue,":[26],"despite":[27],"a":[28],"lack":[29],"to":[33,47,53],"exercise":[34],"hardware.":[36],"Future":[37],"CMPs":[38],"must":[39,50],"deliver":[40,54],"thread-level":[41],"parallelism":[42,63],"when":[43],"provides":[45],"threads":[46,59],"run,":[48],"also":[51],"continue":[52],"performance":[55],"gains":[56],"for":[57],"single":[58],"by":[60],"exploiting":[61,75],"instruction-level":[62],"and":[64],"memory-level":[65],"parallelism.":[66],"However,":[67],"power":[68],"limitations":[69],"prevent":[71],"conventional":[72],"cores":[73],"from":[74],"both":[76],"simultaneously.":[77]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}
