{"id":"https://openalex.org/W2007423069","doi":"https://doi.org/10.1145/1808954.1808960","title":"Predicting multi-core performance","display_name":"Predicting multi-core performance","publication_year":2010,"publication_date":"2010-05-01","ids":{"openalex":"https://openalex.org/W2007423069","doi":"https://doi.org/10.1145/1808954.1808960","mag":"2007423069"},"language":"en","primary_location":{"id":"doi:10.1145/1808954.1808960","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1808954.1808960","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 3rd International Workshop on Multicore Software Engineering","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026464816","display_name":"Akbar Siami Namin","orcid":"https://orcid.org/0000-0002-1646-7495"},"institutions":[{"id":"https://openalex.org/I12315562","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93","country_code":"US","type":"education","lineage":["https://openalex.org/I12315562"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Akbar Siami Namin","raw_affiliation_strings":["Texas Tech University"],"affiliations":[{"raw_affiliation_string":"Texas Tech University","institution_ids":["https://openalex.org/I12315562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019725446","display_name":"Mohan Sridharan","orcid":"https://orcid.org/0000-0001-9922-8969"},"institutions":[{"id":"https://openalex.org/I12315562","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93","country_code":"US","type":"education","lineage":["https://openalex.org/I12315562"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohan Sridharan","raw_affiliation_strings":["Texas Tech University"],"affiliations":[{"raw_affiliation_string":"Texas Tech University","institution_ids":["https://openalex.org/I12315562"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016868998","display_name":"Pulkit Tomar","orcid":null},"institutions":[{"id":"https://openalex.org/I12315562","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93","country_code":"US","type":"education","lineage":["https://openalex.org/I12315562"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pulkit Tomar","raw_affiliation_strings":["Texas Tech University"],"affiliations":[{"raw_affiliation_string":"Texas Tech University","institution_ids":["https://openalex.org/I12315562"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5026464816"],"corresponding_institution_ids":["https://openalex.org/I12315562"],"apc_list":null,"apc_paid":null,"fwci":0.4994,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65182615,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"18","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/structuring","display_name":"Structuring","score":0.8002498149871826},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7849276065826416},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6770683526992798},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5833412408828735},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.5224099159240723},{"id":"https://openalex.org/keywords/many-core","display_name":"Many core","score":0.43035730719566345},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3772446811199188},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.34780943393707275},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3092659115791321},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25875651836395264}],"concepts":[{"id":"https://openalex.org/C2775945657","wikidata":"https://www.wikidata.org/wiki/Q381442","display_name":"Structuring","level":2,"score":0.8002498149871826},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7849276065826416},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6770683526992798},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5833412408828735},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.5224099159240723},{"id":"https://openalex.org/C3020431745","wikidata":"https://www.wikidata.org/wiki/Q25325220","display_name":"Many core","level":2,"score":0.43035730719566345},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3772446811199188},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.34780943393707275},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3092659115791321},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25875651836395264},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1808954.1808960","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1808954.1808960","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 3rd International Workshop on Multicore Software Engineering","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6100000143051147,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309537","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1496560534","https://openalex.org/W1582138098","https://openalex.org/W1663973292","https://openalex.org/W1988301522","https://openalex.org/W2002616339","https://openalex.org/W2009086942","https://openalex.org/W2019240169","https://openalex.org/W2068203359","https://openalex.org/W2109693630","https://openalex.org/W2110855023","https://openalex.org/W2121696621","https://openalex.org/W2150691910","https://openalex.org/W2166091242","https://openalex.org/W6629510986","https://openalex.org/W6667254255"],"related_works":["https://openalex.org/W3023876411","https://openalex.org/W123152114","https://openalex.org/W2394430006","https://openalex.org/W4255057712","https://openalex.org/W1516700698","https://openalex.org/W2384472584","https://openalex.org/W163366574","https://openalex.org/W4251458280","https://openalex.org/W2512412909","https://openalex.org/W1547865754"],"abstract_inverted_index":{"Multi-core":[0],"technology":[1],"is":[2,84],"an":[3,77],"emerging":[4],"hardware":[5],"trend":[6],"that":[7],"provides":[8],"significant":[9],"capabilities":[10],"for":[11],"computationally":[12],"expensive":[13],"applications.":[14],"However,":[15],"it":[16,83],"also":[17],"demands":[18],"a":[19,85],"paradigm":[20],"shift":[21],"in":[22],"the":[23,32,39,44,48,52,61,65,70],"software":[24,36],"industry,":[25],"Software":[26],"developers":[27],"need":[28],"to":[29,87],"think":[30],"about":[31],"best":[33],"distribution":[34],"of":[35,50,56,72],"components":[37],"across":[38],"available":[40],"CPUs,":[41],"and":[42,64,74],"trade-off":[43],"computational":[45],"efficiency":[46],"against":[47],"cost":[49],"re-structuring":[51],"standard":[53],"sequential":[54],"execution":[55],"software.":[57],"The":[58],"relationship":[59],"between":[60],"measured":[62],"performance":[63],"corresponding":[66],"parameters":[67],"such":[68],"as":[69],"number":[71],"threads":[73],"CPUs":[75],"remains":[76],"interesting":[78],"open":[79],"problem,":[80],"especially":[81],"since":[82],"challenge":[86],"conduct":[88],"controlled":[89],"experiments.":[90]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}