{"id":"https://openalex.org/W2097496950","doi":"https://doi.org/10.1145/1806672.1806676","title":"Opportunities for concurrent dynamic analysis with explicit inter-core communication","display_name":"Opportunities for concurrent dynamic analysis with explicit inter-core communication","publication_year":2010,"publication_date":"2010-05-06","ids":{"openalex":"https://openalex.org/W2097496950","doi":"https://doi.org/10.1145/1806672.1806676","mag":"2097496950"},"language":"en","primary_location":{"id":"doi:10.1145/1806672.1806676","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1806672.1806676","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 9th ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074393185","display_name":"Jung-Woo Ha","orcid":"https://orcid.org/0000-0002-7400-7681"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jungwoo Ha","raw_affiliation_strings":["University of Southern California, Los Angeles, CA and Information Sciences Institute East, Arlington, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Los Angeles, CA and Information Sciences Institute East, Arlington, VA, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022935102","display_name":"Stephen P. Crago","orcid":"https://orcid.org/0000-0002-5620-4227"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen P. Crago","raw_affiliation_strings":["University of Southern California, Los Angeles, CA and Information Sciences Institute East, Arlington, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Southern California, Los Angeles, CA and Information Sciences Institute East, Arlington, VA, USA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.15325279,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"17","last_page":"20"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.8901107907295227},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8194191455841064},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.733729898929596},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.7106014490127563},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5818994641304016},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.49735572934150696},{"id":"https://openalex.org/keywords/static-analysis","display_name":"Static analysis","score":0.4890623986721039},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4765118658542633},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4616953134536743},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4599032402038574},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.4396909773349762},{"id":"https://openalex.org/keywords/call-stack","display_name":"Call stack","score":0.42018622159957886},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.41445767879486084},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40328338742256165},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.38075289130210876},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.36297935247421265},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20780673623085022},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12549066543579102}],"concepts":[{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.8901107907295227},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8194191455841064},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.733729898929596},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.7106014490127563},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5818994641304016},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.49735572934150696},{"id":"https://openalex.org/C97686452","wikidata":"https://www.wikidata.org/wiki/Q7604153","display_name":"Static analysis","level":2,"score":0.4890623986721039},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4765118658542633},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4616953134536743},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4599032402038574},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.4396909773349762},{"id":"https://openalex.org/C119024030","wikidata":"https://www.wikidata.org/wiki/Q759899","display_name":"Call stack","level":3,"score":0.42018622159957886},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.41445767879486084},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40328338742256165},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.38075289130210876},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.36297935247421265},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20780673623085022},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12549066543579102},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1806672.1806676","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1806672.1806676","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 9th ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.184.6354","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.184.6354","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.east.isi.edu/%7Ejha/papers/concprof-paste10.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W178302743","https://openalex.org/W2007920703","https://openalex.org/W2008311123","https://openalex.org/W2016779705","https://openalex.org/W2077324087","https://openalex.org/W2078197548","https://openalex.org/W2104809773","https://openalex.org/W2121082877","https://openalex.org/W2129592257","https://openalex.org/W2146804254","https://openalex.org/W2151965112","https://openalex.org/W2153229512","https://openalex.org/W2168874123","https://openalex.org/W2169875292","https://openalex.org/W4232090211","https://openalex.org/W4246430693"],"related_works":["https://openalex.org/W3104857564","https://openalex.org/W2950520577","https://openalex.org/W2105992728","https://openalex.org/W2109463584","https://openalex.org/W1229628","https://openalex.org/W2009213655","https://openalex.org/W1991844655","https://openalex.org/W2003935582","https://openalex.org/W2500545237","https://openalex.org/W2528134415"],"abstract_inverted_index":{"Multicore":[0],"is":[1,12],"now":[2],"the":[3,8,21,24,77,84],"dominant":[4],"processor":[5,69],"trend,":[6],"and":[7,46],"number":[9],"of":[10,23,80],"cores":[11],"rapidly":[13],"increasing.":[14],"The":[15],"paradigm":[16],"shift":[17],"to":[18,36],"multicore":[19,85],"forces":[20],"redesign":[22],"software":[25,37],"stack,":[26],"which":[27,56],"includes":[28],"dynamic":[29,81],"analysis.":[30],"Dynamic":[31],"analyses":[32,82],"provide":[33],"rich":[34],"features":[35],"in":[38,83],"various":[39],"areas,":[40],"such":[41],"as":[42,71],"debugging,":[43],"testing,":[44],"optimization,":[45],"security.":[47],"However,":[48],"these":[49],"techniques":[50],"often":[51],"suffer":[52],"from":[53],"excessive":[54],"overhead,":[55],"make":[57],"it":[58],"less":[59],"practical.":[60],"Previously,":[61],"this":[62],"overhead":[63],"has":[64],"been":[65],"overcome":[66],"by":[67],"improved":[68],"performance":[70,78],"each":[72],"generation":[73],"gets":[74],"faster,":[75],"but":[76],"requirements":[79],"era":[86],"cannot":[87],"be":[88],"fulfilled":[89],"without":[90],"redesigning":[91],"for":[92],"parallelism.":[93]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}