{"id":"https://openalex.org/W2048292126","doi":"https://doi.org/10.1145/1785481.1785518","title":"Cost aware fault tolerant logic synthesis in presence of soft errors","display_name":"Cost aware fault tolerant logic synthesis in presence of soft errors","publication_year":2010,"publication_date":"2010-05-16","ids":{"openalex":"https://openalex.org/W2048292126","doi":"https://doi.org/10.1145/1785481.1785518","mag":"2048292126"},"language":"en","primary_location":{"id":"doi:10.1145/1785481.1785518","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1785481.1785518","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th symposium on Great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054957806","display_name":"Xin He","orcid":"https://orcid.org/0000-0001-6983-3834"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xin He","raw_affiliation_strings":["University of California, Riverside, Riverside, CA, USA","University of California, RIverside, Riverside, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, RIverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109214532","display_name":"Afshin Abdollahi","orcid":null},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Afshin Abdollahi","raw_affiliation_strings":["University of California, Riverside, Riverside, CA, USA","University of California, RIverside, Riverside, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, RIverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5054957806"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11376979,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"151","last_page":"154"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10780","display_name":"Reliability and Maintenance Optimization","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/2213","display_name":"Safety, Risk, Reliability and Quality"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.7863947749137878},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6692987680435181},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.6455584168434143},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6226663589477539},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.6159765720367432},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5527620315551758},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5494139790534973},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5451383590698242},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.467085599899292},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4592897593975067},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.45723801851272583},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4555943012237549},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.44472232460975647},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4289838373661041},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4141753315925598},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37045714259147644},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.29585397243499756},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29510751366615295},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.294070839881897},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20577287673950195},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.10471639037132263},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08828219771385193}],"concepts":[{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.7863947749137878},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6692987680435181},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.6455584168434143},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6226663589477539},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.6159765720367432},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5527620315551758},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5494139790534973},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5451383590698242},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.467085599899292},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4592897593975067},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.45723801851272583},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4555943012237549},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.44472232460975647},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4289838373661041},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4141753315925598},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37045714259147644},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.29585397243499756},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29510751366615295},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.294070839881897},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20577287673950195},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.10471639037132263},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08828219771385193},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1785481.1785518","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1785481.1785518","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th symposium on Great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2010966375","https://openalex.org/W2104402818","https://openalex.org/W2106635847","https://openalex.org/W2121426527","https://openalex.org/W2140388451","https://openalex.org/W2169213530","https://openalex.org/W2497735908","https://openalex.org/W3182208082"],"related_works":["https://openalex.org/W2531550288","https://openalex.org/W2149041233","https://openalex.org/W2000379092","https://openalex.org/W2995137536","https://openalex.org/W2158463942","https://openalex.org/W2171347834","https://openalex.org/W2066042903","https://openalex.org/W2152497502","https://openalex.org/W1749592617","https://openalex.org/W2085138612"],"abstract_inverted_index":{"With":[0],"the":[1,33,55],"emergence":[2],"of":[3,35,57,95],"sub-100":[4],"nanometers,":[5],"soft":[6],"error":[7,91],"failure":[8],"rates":[9],"(SER)":[10],"due":[11],"to":[12,31,53],"Single-event":[13],"Upsets":[14],"(SEU)":[15],"from":[16],"particle":[17],"strikes":[18],"become":[19],"unacceptable":[20],"for":[21],"combinational":[22],"logic":[23],"circuits.":[24],"Triple":[25],"modular":[26],"redundancy":[27],"(TMR)":[28],"is":[29,100],"applied":[30],"improve":[32],"reliability":[34,110],"VLSI":[36,60],"circuits,":[37],"entailing":[38],"additional":[39],"cost":[40],"(area,":[41],"delay,":[42],"power":[43],"consumption,":[44],"e.g.).":[45],"This":[46],"paper":[47],"introduce":[48],"a":[49,66],"partial":[50],"TMR":[51],"solution":[52],"optimize":[54],"area":[56,118],"fault":[58],"tolerant":[59],"circuits":[61],"with":[62,76,115],"SER":[63,84],"constraints,":[64],"presenting":[65],"novel":[67],"optimization":[68],"method":[69],"by":[70,111],"Binary":[71],"Integer":[72],"Linear":[73],"Programming":[74],"(BILP)":[75],"components":[77],"consideration,.":[78],"It":[79],"also":[80],"proposes":[81],"an":[82,112],"efficient":[83],"evaluation":[85],"model":[86],"base":[87],"on":[88,97],"linear":[89],"gate":[90],"propagation.":[92],"A":[93],"series":[94],"simulation":[96],"NCMC'89":[98],"benchmark":[99],"made.":[101],"The":[102],"experiment":[103],"results":[104],"show":[105],"that":[106],"this":[107],"technique":[108],"improves":[109],"average":[113],"57.95%":[114],"only":[116],"36.98%":[117],"overhead.":[119]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}