{"id":"https://openalex.org/W2042259487","doi":"https://doi.org/10.1145/1741906.1742107","title":"Low power analysis of DLX processor datapath using a novel clocking scheme","display_name":"Low power analysis of DLX processor datapath using a novel clocking scheme","publication_year":2010,"publication_date":"2010-02-26","ids":{"openalex":"https://openalex.org/W2042259487","doi":"https://doi.org/10.1145/1741906.1742107","mag":"2042259487"},"language":"en","primary_location":{"id":"doi:10.1145/1741906.1742107","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1741906.1742107","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference and Workshop on Emerging Trends in Technology","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046384916","display_name":"Rajesh Kannan Megalingam","orcid":"https://orcid.org/0000-0003-1097-5576"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R. K. Megalingam","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005370210","display_name":"Siti Lailatul Mohd Hassan","orcid":"https://orcid.org/0000-0002-9065-8417"},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"S. Hassan","raw_affiliation_strings":["","Amrita Vishwa Vidyapeetham, Coimbatore, India"],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]},{"raw_affiliation_string":"Amrita Vishwa Vidyapeetham, Coimbatore, India","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004945843","display_name":"T.Srinivasa Rao","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"T. Rao","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081244993","display_name":"Ashwin Mohan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. Mohan","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007829355","display_name":"V. Perieye","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"V. Perieye","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5046384916"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.11664031,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":99,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"874","last_page":"879"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9959102869033813},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.694922685623169},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6101944446563721},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6055008769035339},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5448631048202515},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5070881843566895},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5056717395782471},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.4685916304588318},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.453624427318573},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4521293342113495},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4300515055656433},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4174412488937378},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36264270544052124},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35871365666389465},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07380437850952148}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9959102869033813},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.694922685623169},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6101944446563721},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6055008769035339},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5448631048202515},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5070881843566895},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5056717395782471},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.4685916304588318},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.453624427318573},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4521293342113495},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4300515055656433},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4174412488937378},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36264270544052124},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35871365666389465},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07380437850952148},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1741906.1742107","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1741906.1742107","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference and Workshop on Emerging Trends in Technology","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320311327","display_name":"Amrita Vishwa Vidyapeetham University","ror":"https://ror.org/03am10p12"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W642765313","https://openalex.org/W1492601037","https://openalex.org/W1555915743","https://openalex.org/W2004888730","https://openalex.org/W2073702209","https://openalex.org/W2097015933","https://openalex.org/W2119994507","https://openalex.org/W2122782125","https://openalex.org/W2532861872","https://openalex.org/W2788962374","https://openalex.org/W4299544653"],"related_works":["https://openalex.org/W2534955606","https://openalex.org/W2891272018","https://openalex.org/W1921751656","https://openalex.org/W3215869375","https://openalex.org/W2906861169","https://openalex.org/W1742462572","https://openalex.org/W2072821077","https://openalex.org/W2348831282","https://openalex.org/W2105974726","https://openalex.org/W575537888"],"abstract_inverted_index":{"Low":[0],"power":[1,45,75,92,117],"VLSI":[2],"circuit":[3],"design":[4],"is":[5,19],"a":[6,31,48,95],"core":[7],"area":[8],"for":[9,23],"current":[10],"research":[11],"activities.":[12],"Power":[13],"reduction":[14],"without":[15,99],"compromising":[16],"the":[17,20,44,57,74,80,91,101,104,110,115,120],"performance":[18],"vital":[21],"concern":[22],"processor":[24,49,60,122],"design.":[25],"In":[26],"this":[27],"paper,":[28],"we":[29,107],"apply":[30],"new":[32],"clocking":[33,67],"scheme":[34],"as":[35,69],"in":[36,47,62,70],"[1]":[37,71],"that":[38,88],"can":[39,89],"be":[40],"used":[41],"to":[42],"reduce":[43],"consumption":[46,93,118],"datapath.":[50,123],"We":[51,77],"have":[52,78,108],"mainly":[53],"focused":[54],"on":[55],"implementing":[56],"pipelined":[58,96],"DLX":[59,121],"datapath":[61,97],"HDL":[63],"using":[64],"two":[65],"different":[66],"schemes":[68],"and":[72],"analyzed":[73],"consumption.":[76],"adopted":[79],"method":[81],"which":[82,113],"uses":[83],"dual":[84],"edge":[85],"triggered":[86],"clock":[87],"decrease":[90],"of":[94,103,119],"considerably,":[98],"sacrificing":[100],"throughput":[102],"CPU.":[105],"Finally,":[106],"given":[109],"experimental":[111],"results":[112],"confirm":[114],"low":[116]},"counts_by_year":[{"year":2026,"cited_by_count":3}],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-10-10T00:00:00"}