{"id":"https://openalex.org/W2010909490","doi":"https://doi.org/10.1145/1741906.1742103","title":"A low-power content-addressable memory (CAM) using pipelined search scheme","display_name":"A low-power content-addressable memory (CAM) using pipelined search scheme","publication_year":2010,"publication_date":"2010-02-26","ids":{"openalex":"https://openalex.org/W2010909490","doi":"https://doi.org/10.1145/1741906.1742103","mag":"2010909490"},"language":"en","primary_location":{"id":"doi:10.1145/1741906.1742103","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1741906.1742103","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference and Workshop on Emerging Trends in Technology","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005501805","display_name":"Indrajit Mandal","orcid":"https://orcid.org/0000-0003-3387-5922"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"I. Mandal","raw_affiliation_strings":["SRSIT, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"SRSIT, Bangalore, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5005501805"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2484,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80408596,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"853","last_page":"858"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9706000089645386,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10400","display_name":"Network Security and Intrusion Detection","score":0.9652000069618225,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8273388147354126},{"id":"https://openalex.org/keywords/content-addressable-memory","display_name":"Content-addressable memory","score":0.7491262555122375},{"id":"https://openalex.org/keywords/content-addressable-storage","display_name":"Content-addressable storage","score":0.6198074817657471},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5179442763328552},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5038768649101257},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5002949237823486},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4930433928966522},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4713171124458313},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4610120356082916},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.4475671052932739},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4246918261051178},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41341981291770935},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.41305097937583923},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41113603115081787},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.31353944540023804},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1973043978214264},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.12369415163993835},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09572890400886536},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09415996074676514}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8273388147354126},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.7491262555122375},{"id":"https://openalex.org/C2778618852","wikidata":"https://www.wikidata.org/wiki/Q1128613","display_name":"Content-addressable storage","level":4,"score":0.6198074817657471},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5179442763328552},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5038768649101257},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5002949237823486},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4930433928966522},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4713171124458313},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4610120356082916},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.4475671052932739},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4246918261051178},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41341981291770935},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.41305097937583923},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41113603115081787},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.31353944540023804},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1973043978214264},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.12369415163993835},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09572890400886536},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09415996074676514},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1741906.1742103","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1741906.1742103","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference and Workshop on Emerging Trends in Technology","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1968175387","https://openalex.org/W1997117014","https://openalex.org/W2068362367","https://openalex.org/W2112578389","https://openalex.org/W2137231558","https://openalex.org/W2165172548","https://openalex.org/W3103339143"],"related_works":["https://openalex.org/W2100773763","https://openalex.org/W3103704822","https://openalex.org/W2282934097","https://openalex.org/W2047264287","https://openalex.org/W2561005478","https://openalex.org/W1556265168","https://openalex.org/W3093911585","https://openalex.org/W2104200744","https://openalex.org/W2044064773","https://openalex.org/W2181404029"],"abstract_inverted_index":{"A":[0],"Content-Addressable":[1],"Memory":[2],"(CAM)":[3],"is":[4,54,89,94,118,126],"a":[5,13,40,79,135],"memory":[6,74,83,157],"that":[7,45],"implements":[8],"the":[9,63,97,105,115,124],"lookup-table":[10],"function":[11],"in":[12,25,39,111,134],"single":[14],"clock":[15],"cycle":[16],"using":[17,84],"dedicated":[18],"comparison":[19],"circuitry.":[20],"CAMs":[21],"are":[22,36,99],"especially":[23],"popular":[24],"network":[26],"routers":[27],"for":[28,120,154],"packet":[29,32],"forwarding":[30],"and":[31,96],"classification,":[33],"but":[34],"they":[35],"also":[37],"beneficial":[38],"variety":[41],"of":[42,66,148],"other":[43],"application":[44],"requires":[46],"high-speed":[47],"table":[48],"lookup.":[49],"The":[50,91,128,140],"main":[51],"CAM-design":[52],"challenge":[53],"to":[55,101,109,151],"reduce":[56,58],"power":[57,59,81,125,146],"consumption":[60],"associated":[61],"with":[62],"large":[64],"amount":[65],"parallel":[67],"active":[68],"circuitry,":[69],"without":[70],"sacrificing":[71],"speed":[72],"or":[73],"density.":[75],"In":[76],"this":[77],"project,":[78],"low":[80],"content-addressable":[82],"pipelined":[85,95],"hierarchical":[86],"search":[87,92,116],"scheme":[88,130],"implemented.":[90],"operation":[93,117],"match-lines":[98],"broken":[100],"several":[102],"segments.":[103],"Whenever":[104],"stored":[106],"words":[107],"fail":[108],"match":[110],"their":[112],"initial":[113],"segments,":[114,122],"discontinued":[119],"subsequent":[121],"hence":[123],"saved.":[127],"proposed":[129],"has":[131],"bee":[132],"implemented":[133],"64x64-bit":[136],"ternary":[137],"CMOS":[138],"CAM.":[139],"results":[141],"demonstrate":[142],"an":[143],"effective":[144],"overall":[145],"reduction":[147],"56%":[149],"compared":[150],"nonpipelined":[152],"architecture":[153],"given":[155],"example":[156],"pattern.":[158]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}