{"id":"https://openalex.org/W1975311720","doi":"https://doi.org/10.1145/1731740.1731751","title":"Hardware implementation of strategies for servicing queues","display_name":"Hardware implementation of strategies for servicing queues","publication_year":2009,"publication_date":"2009-06-18","ids":{"openalex":"https://openalex.org/W1975311720","doi":"https://doi.org/10.1145/1731740.1731751","mag":"1975311720"},"language":"en","primary_location":{"id":"doi:10.1145/1731740.1731751","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1731740.1731751","pdf_url":null,"source":{"id":"https://openalex.org/S4210222260","display_name":"Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing","issn_l":"1313-8936","issn":["1313-8936","1313-9037"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032504159","display_name":"Stoyan Prokopov","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Stoyan Prokopov","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002317560","display_name":"Dimitar Tyanev","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dimitar Tyanev","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5032504159"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.5263,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.82665161,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14470","display_name":"Advanced Data Processing Techniques","score":0.9793999791145325,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14470","display_name":"Advanced Data Processing Techniques","score":0.9793999791145325,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9297000169754028,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T12127","display_name":"Software System Performance and Reliability","score":0.9068999886512756,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7540534138679504},{"id":"https://openalex.org/keywords/queue","display_name":"Queue","score":0.697973906993866},{"id":"https://openalex.org/keywords/interrupt","display_name":"Interrupt","score":0.6625634431838989},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5962224006652832},{"id":"https://openalex.org/keywords/complex-programmable-logic-device","display_name":"Complex programmable logic device","score":0.5249733328819275},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5117099285125732},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4717610478401184},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.46359625458717346},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.3627866506576538},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20984911918640137},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17535746097564697},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1673433780670166},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.07875347137451172}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7540534138679504},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.697973906993866},{"id":"https://openalex.org/C41661131","wikidata":"https://www.wikidata.org/wiki/Q220764","display_name":"Interrupt","level":3,"score":0.6625634431838989},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5962224006652832},{"id":"https://openalex.org/C128315158","wikidata":"https://www.wikidata.org/wiki/Q1063858","display_name":"Complex programmable logic device","level":2,"score":0.5249733328819275},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5117099285125732},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4717610478401184},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.46359625458717346},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.3627866506576538},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20984911918640137},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17535746097564697},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1673433780670166},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.07875347137451172},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1731740.1731751","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1731740.1731751","pdf_url":null,"source":{"id":"https://openalex.org/S4210222260","display_name":"Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing","issn_l":"1313-8936","issn":["1313-8936","1313-9037"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1491248193","https://openalex.org/W1555915743","https://openalex.org/W1567646530","https://openalex.org/W1715248483","https://openalex.org/W2147058713"],"related_works":["https://openalex.org/W2375339411","https://openalex.org/W4247089581","https://openalex.org/W3006003651","https://openalex.org/W331180034","https://openalex.org/W2107880456","https://openalex.org/W1596690381","https://openalex.org/W4247180033","https://openalex.org/W2088914741","https://openalex.org/W2133326759","https://openalex.org/W2559451387"],"abstract_inverted_index":{"This":[0],"article":[1],"explores":[2],"two":[3,37],"original":[4],"hardware":[5],"solutions":[6],"for":[7,19],"service":[8],"of":[9,34,39,61],"queues.":[10],"The":[11,46,55],"three-clock":[12],"cycle":[13],"is":[14],"proven":[15],"as":[16],"a":[17,20,58],"necessity":[18],"reliable":[21],"choice":[22],"process.":[23],"Two":[24],"logic":[25],"structures":[26],"are":[27,52],"presented:":[28],"one-clock":[29],"and":[30,43,63],"many-clock,":[31],"each":[32],"capable":[33],"servicing":[35],"the":[36,49],"types":[38],"queues":[40],"-":[41],"with":[42],"without":[44],"jumping.":[45],"algorithms":[47],"representing":[48],"structures'":[50],"functioning":[51],"thoroughly":[53],"explained.":[54],"schemes":[56],"allow":[57],"wide":[59],"degree":[60],"adaptivity":[62],"can":[64],"easily":[65],"be":[66],"integrated":[67],"into":[68],"projects,":[69],"based":[70],"on":[71],"FPGA":[72],"or":[73],"CPLD,":[74],"when":[75],"constructing":[76],"interrupt":[77],"control":[78],"systems,":[79,81],"arbitrary":[80],"etc.":[82]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}