{"id":"https://openalex.org/W2110085199","doi":"https://doi.org/10.1145/1723112.1723124","title":"Bit-level optimization for high-level synthesis and FPGA-based acceleration","display_name":"Bit-level optimization for high-level synthesis and FPGA-based acceleration","publication_year":2010,"publication_date":"2010-02-21","ids":{"openalex":"https://openalex.org/W2110085199","doi":"https://doi.org/10.1145/1723112.1723124","mag":"2110085199"},"language":"en","primary_location":{"id":"doi:10.1145/1723112.1723124","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1723112.1723124","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100659013","display_name":"Jiyu Zhang","orcid":"https://orcid.org/0000-0001-8071-0341"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jiyu Zhang","raw_affiliation_strings":["Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037210004","display_name":"Zhiru Zhang","orcid":"https://orcid.org/0000-0002-0778-0308"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhiru Zhang","raw_affiliation_strings":["AutoESL Design Technologies, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"AutoESL Design Technologies, Los Angeles, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029584046","display_name":"Sheng Zhou","orcid":"https://orcid.org/0000-0003-3578-7926"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sheng Zhou","raw_affiliation_strings":["AutoESL Design Technologies, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"AutoESL Design Technologies, Los Angeles, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110774377","display_name":"Mingxing Tan","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mingxing Tan","raw_affiliation_strings":["Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042553551","display_name":"Xianhua Liu","orcid":"https://orcid.org/0000-0003-4777-3847"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianhua Liu","raw_affiliation_strings":["Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100691552","display_name":"Xu Cheng","orcid":"https://orcid.org/0000-0002-5544-8852"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xu Cheng","raw_affiliation_strings":["Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016776689","display_name":"Jason Cong","orcid":"https://orcid.org/0000-0003-2887-6963"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jason Cong","raw_affiliation_strings":["University Of California, Los Angeles; UCLA-PKU Joint Research Institute in Science and Engineering, Los Angeles, CA, USA","University Of California, Los Angeles"],"affiliations":[{"raw_affiliation_string":"University Of California, Los Angeles; UCLA-PKU Joint Research Institute in Science and Engineering, Los Angeles, CA, USA","institution_ids":[]},{"raw_affiliation_string":"University Of California, Los Angeles","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5100659013"],"corresponding_institution_ids":["https://openalex.org/I20231570"],"apc_list":null,"apc_paid":null,"fwci":2.5269,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.90279974,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"59","last_page":"68"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8488092422485352},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7345678806304932},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6563167572021484},{"id":"https://openalex.org/keywords/bitwise-operation","display_name":"Bitwise operation","score":0.6488996744155884},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5084046721458435},{"id":"https://openalex.org/keywords/place-and-route","display_name":"Place and route","score":0.4605270028114319},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.41831931471824646},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3520590662956238},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23920997977256775},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2140350341796875}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8488092422485352},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7345678806304932},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6563167572021484},{"id":"https://openalex.org/C134765980","wikidata":"https://www.wikidata.org/wiki/Q879126","display_name":"Bitwise operation","level":2,"score":0.6488996744155884},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5084046721458435},{"id":"https://openalex.org/C127879752","wikidata":"https://www.wikidata.org/wiki/Q3390760","display_name":"Place and route","level":3,"score":0.4605270028114319},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.41831931471824646},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3520590662956238},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23920997977256775},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2140350341796875}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1723112.1723124","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1723112.1723124","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.153.8234","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.153.8234","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://cadlab.cs.ucla.edu/~cong/papers/fpga041-zhang.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W83586921","https://openalex.org/W196877837","https://openalex.org/W1491178396","https://openalex.org/W1721908487","https://openalex.org/W1757537413","https://openalex.org/W1772887859","https://openalex.org/W2114067856","https://openalex.org/W2122862680","https://openalex.org/W2153185479","https://openalex.org/W2156420848","https://openalex.org/W2169350980","https://openalex.org/W2191327475","https://openalex.org/W4253669045","https://openalex.org/W6608013908","https://openalex.org/W6687987274"],"related_works":["https://openalex.org/W2612099726","https://openalex.org/W2160632767","https://openalex.org/W2542684176","https://openalex.org/W2772067181","https://openalex.org/W2184011203","https://openalex.org/W2073137766","https://openalex.org/W2735446578","https://openalex.org/W2543290882","https://openalex.org/W1839177134","https://openalex.org/W2110085199"],"abstract_inverted_index":{"Automated":[0],"hardware":[1,39],"design":[2],"from":[3],"behavior-level":[4],"abstraction":[5],"has":[6],"drawn":[7],"wide":[8],"interest":[9],"in":[10],"FPGA-based":[11],"acceleration":[12],"and":[13,32,42,64,84,93],"configurable":[14],"computing":[15],"research":[16],"field.":[17],"However,":[18],"for":[19,52,138],"many":[20],"high-level":[21,43,69,115],"programming":[22],"languages,":[23,41],"such":[24],"as":[25,36,38],"C/C++,":[26],"the":[27,94,101,149,151],"description":[28,40],"of":[29,45,71,141],"bitwise":[30,53,111],"access":[31],"computation":[33],"is":[34,154],"not":[35],"direct":[37],"synthesis":[44,70,116],"algorithmic":[46,72],"descriptions":[47],"may":[48],"generate":[49,120],"suboptimal":[50],"implementations":[51],"computation-intensive":[54],"applications.":[55],"In":[56,148],"this":[57,91],"paper":[58],"we":[59],"introduce":[60,75],"a":[61,76,107,139],"bit-level":[62],"transformation":[63],"optimization":[65],"approach":[66],"to":[67,79,100,118],"assisting":[68],"descriptions.":[73],"We":[74],"bit-flow":[77],"graph":[78],"capture":[80],"bit-value":[81],"information.":[82],"Analysis":[83],"optimizing":[85],"transformations":[86],"can":[87,130],"be":[88],"performed":[89],"on":[90,136,144,158],"representation,":[92],"optimized":[95],"results":[96],"are":[97],"transformed":[98],"back":[99],"standard":[102],"data-flow":[103],"graphs":[104],"extended":[105],"with":[106,122,160],"few":[108],"instructions":[109],"representing":[110],"access.":[112],"This":[113],"allows":[114],"tools":[117],"automatically":[119],"circuits":[121],"higher":[123],"quality.":[124],"Experiments":[125],"show":[126],"that":[127],"our":[128],"algorithm":[129],"reduce":[131],"slice":[132],"usage":[133],"by":[134,156],"29.8%":[135],"average":[137],"set":[140],"real-life":[142],"benchmarks":[143],"Xilinx":[145],"Virtex-4":[146],"FPGAs.":[147],"meantime,":[150],"clock":[152],"period":[153],"reduced":[155],"13.6%":[157],"average,":[159],"an":[161],"11.4%":[162],"latency":[163],"reduction.":[164]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
