{"id":"https://openalex.org/W2169625571","doi":"https://doi.org/10.1145/1669112.1669143","title":"In-network coherence filtering","display_name":"In-network coherence filtering","publication_year":2009,"publication_date":"2009-12-12","ids":{"openalex":"https://openalex.org/W2169625571","doi":"https://doi.org/10.1145/1669112.1669143","mag":"2169625571"},"language":"en","primary_location":{"id":"doi:10.1145/1669112.1669143","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1669112.1669143","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/1721.1/58870","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035320125","display_name":"Niket Agarwal","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Niket Agarwal","raw_affiliation_strings":["Princeton University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057413185","display_name":"Li-Shiuan Peh","orcid":"https://orcid.org/0000-0001-9010-6519"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Li-Shiuan Peh","raw_affiliation_strings":["Massachusetts Institute of Technology"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Massachusetts Institute of Technology","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086131079","display_name":"Niraj K. Jha","orcid":"https://orcid.org/0000-0002-1539-0369"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Niraj K. Jha","raw_affiliation_strings":["Princeton University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":47,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"232","last_page":"243"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8242822885513306},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.8007171154022217},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.5207622051239014},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5009729862213135},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.4528619945049286},{"id":"https://openalex.org/keywords/mesif-protocol","display_name":"MESIF protocol","score":0.42465221881866455},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.42318564653396606},{"id":"https://openalex.org/keywords/uniprocessor-system","display_name":"Uniprocessor system","score":0.41553795337677},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.396270751953125},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.37555503845214844},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3557434380054474},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.29590046405792236},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.26446133852005005},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2318694293498993},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.18852493166923523},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1823045015335083}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8242822885513306},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.8007171154022217},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.5207622051239014},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5009729862213135},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.4528619945049286},{"id":"https://openalex.org/C199979278","wikidata":"https://www.wikidata.org/wiki/Q263221","display_name":"MESIF protocol","level":5,"score":0.42465221881866455},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.42318564653396606},{"id":"https://openalex.org/C79189994","wikidata":"https://www.wikidata.org/wiki/Q3488021","display_name":"Uniprocessor system","level":3,"score":0.41553795337677},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.396270751953125},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.37555503845214844},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3557434380054474},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.29590046405792236},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.26446133852005005},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2318694293498993},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.18852493166923523},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1823045015335083}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1669112.1669143","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1669112.1669143","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},{"id":"pmh:oai:dspace.mit.edu:1721.1/58870","is_oa":true,"landing_page_url":"http://hdl.handle.net/1721.1/58870","pdf_url":null,"source":{"id":"https://openalex.org/S4306400425","display_name":"DSpace@MIT (Massachusetts Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I63966007","host_organization_name":"Massachusetts Institute of Technology","host_organization_lineage":["https://openalex.org/I63966007"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE","raw_type":"Article"}],"best_oa_location":{"id":"pmh:oai:dspace.mit.edu:1721.1/58870","is_oa":true,"landing_page_url":"http://hdl.handle.net/1721.1/58870","pdf_url":null,"source":{"id":"https://openalex.org/S4306400425","display_name":"DSpace@MIT (Massachusetts Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I63966007","host_organization_name":"Massachusetts Institute of Technology","host_organization_lineage":["https://openalex.org/I63966007"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE","raw_type":"Article"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5699999928474426}],"awards":[{"id":"https://openalex.org/G3156065936","display_name":null,"funder_award_id":"CNS-0613074","funder_id":"https://openalex.org/F4320337388","funder_display_name":"Division of Computer and Network Systems"},{"id":"https://openalex.org/G5614041144","display_name":null,"funder_award_id":"2008-HJ-1793","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G6812444581","display_name":"CSR---SMA: Thermal Modeling, Management, and Characterization of Chip Multiprocessors","funder_award_id":"0613074","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320337388","display_name":"Division of Computer and Network Systems","ror":"https://ror.org/02rdzmk74"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W2033797066","https://openalex.org/W2062265941","https://openalex.org/W2095314640","https://openalex.org/W2096193215","https://openalex.org/W2097876246","https://openalex.org/W2105223453","https://openalex.org/W2110683663","https://openalex.org/W2114995630","https://openalex.org/W2116751788","https://openalex.org/W2135673469","https://openalex.org/W2144461965","https://openalex.org/W2145021036","https://openalex.org/W2146330566","https://openalex.org/W2146743175","https://openalex.org/W2148103955","https://openalex.org/W2157225945","https://openalex.org/W2157860533","https://openalex.org/W2164264749","https://openalex.org/W2166151045","https://openalex.org/W2168682824","https://openalex.org/W2169875292","https://openalex.org/W2172097538","https://openalex.org/W3150612471","https://openalex.org/W4231723008","https://openalex.org/W4232664043","https://openalex.org/W4238182192","https://openalex.org/W4255469022"],"related_works":["https://openalex.org/W2290195868","https://openalex.org/W2584505417","https://openalex.org/W4285204597","https://openalex.org/W1555453305","https://openalex.org/W3193874149","https://openalex.org/W2987765027","https://openalex.org/W2047210963","https://openalex.org/W2379215066","https://openalex.org/W1907826018","https://openalex.org/W2057019356"],"abstract_inverted_index":{"With":[0],"transistor":[1],"miniaturization":[2],"leading":[3],"to":[4,35,69,116,156,192],"an":[5,203,231,252],"abundance":[6],"of":[7,39,59,91,197,239],"on-chip":[8,141],"resources":[9],"and":[10,23,44,64,84,96,127,175,177],"uniprocessor":[11],"designs":[12],"providing":[13],"diminishing":[14],"returns,":[15],"the":[16,25,46,56,89,108,120,194,200,245],"industry":[17],"has":[18,123],"moved":[19],"beyond":[20],"single-core":[21],"microprocessors":[22],"embraced":[24],"many-core":[26,47,182],"wave.":[27],"Scalable":[28],"cache":[29],"coherence":[30,51,113,138,188],"protocol":[31],"implementations":[32],"are":[33,73,163,190],"necessary":[34],"allow":[36],"fast":[37],"sharing":[38,146,152],"data":[40],"among":[41,148],"various":[42,74,149],"cores":[43,118],"drive":[45],"revolution":[48],"forward.":[49],"Snoopy":[50],"protocols,":[52],"if":[53],"realizable,":[54],"have":[55,107],"desirable":[57],"property":[58],"having":[60],"low":[61],"storage":[62],"overhead":[63,110],"not":[65],"adding":[66],"indirection":[67],"delay":[68],"cache-to-cache":[70],"accesses.":[71],"There":[72],"proposals,":[75],"like":[76],"Token":[77],"Coherence":[78],"(TokenB),":[79],"Uncorq,":[80],"Intel":[81],"QPI,":[82],"INSO":[83],"Timestamp":[85],"Snooping,":[86],"that":[87,143,162,241],"tackle":[88],"ordering":[90],"requests":[92,161],"in":[93,119,199,236],"snoopy":[94,104,179],"protocols":[95,105,180],"make":[97],"them":[98],"realizable":[99],"on":[100,181,202,214,230,251],"unordered":[101],"networks.":[102],"However,":[103],"still":[106],"broadcast":[109],"because":[111],"each":[112],"request":[114],"goes":[115],"all":[117],"system.":[121],"This":[122,151],"substantial":[124],"network":[125,173,210,247],"bandwidth":[126,174],"power":[128,176],"implications.":[129],"In":[130],"this":[131],"work,":[132],"we":[133],"propose":[134],"embedding":[135],"small":[136],"in-network":[137,187],"filters":[139,189],"inside":[140],"routers":[142],"dynamically":[144],"track":[145],"patterns":[147],"cores.":[150,167],"information":[153],"is":[154],"used":[155],"filter":[157],"away":[158],"redundant":[159],"snoop":[160],"traveling":[164],"towards":[165],"unshared":[166],"Filtering":[168],"these":[169],"useless":[170],"messages":[171],"saves":[172],"makes":[178],"systems":[183,219],"truly":[184],"scalable.":[185],"Our":[186],"able":[191],"reduce":[193],"total":[195,209,237,246],"number":[196,238],"snoops":[198,240],"system":[201],"average":[204,232],"by":[205,212,249],"41.9%,":[206],"thereby":[207],"reducing":[208,244],"traffic":[211,248],"25.4%":[213],"16-processor":[215],"chip":[216],"multiprocessor":[217],"(CMP)":[218],"running":[220],"parallel":[221],"applications.":[222],"For":[223],"64-processor":[224],"CMP":[225],"systems,":[226],"our":[227],"filtering":[228],"technique":[229],"achieves":[233],"46.5%":[234],"reduction":[235],"ends":[242],"up":[243],"27.3%,":[250],"average.":[253]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":4}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}