{"id":"https://openalex.org/W2119306084","doi":"https://doi.org/10.1145/1669112.1669128","title":"Low Vccmin fault-tolerant cache with highly predictable performance","display_name":"Low Vccmin fault-tolerant cache with highly predictable performance","publication_year":2009,"publication_date":"2009-12-12","ids":{"openalex":"https://openalex.org/W2119306084","doi":"https://doi.org/10.1145/1669112.1669128","mag":"2119306084"},"language":"en","primary_location":{"id":"doi:10.1145/1669112.1669128","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1669112.1669128","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020861175","display_name":"Jaume Abella","orcid":"https://orcid.org/0000-0001-7951-4028"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]},{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Jaume Abella","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)"],"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103578976","display_name":"Javier Carretero","orcid":null},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Javier Carretero","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)"],"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111728780","display_name":"Pedro Chaparro","orcid":null},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pedro Chaparro","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)"],"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046613695","display_name":"Xavier Vera","orcid":null},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]},{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Xavier Vera","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)"],"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100733331","display_name":"Antonio Gonz\u00e1lez","orcid":"https://orcid.org/0000-0002-0009-0996"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]},{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Gonz\u00e1lez","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)"],"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Labs Barcelona - UPC, (Spain)","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5020861175"],"corresponding_institution_ids":["https://openalex.org/I4210136471","https://openalex.org/I9617848"],"apc_list":null,"apc_paid":null,"fwci":6.7006,"has_fulltext":false,"cited_by_count":87,"citation_normalized_percentile":{"value":0.97066529,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"111","last_page":"121"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7735310792922974},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6490129232406616},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6438508033752441},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5505931973457336},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5193589925765991},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4902782738208771},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.48880645632743835},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4672078490257263},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.4667413830757141},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4574818015098572},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.43143516778945923},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4171808362007141},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.34761542081832886},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23112016916275024},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.22719699144363403},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.18397986888885498},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.17634665966033936},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16056358814239502},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15116393566131592},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08963072299957275}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7735310792922974},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6490129232406616},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6438508033752441},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5505931973457336},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5193589925765991},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4902782738208771},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.48880645632743835},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4672078490257263},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.4667413830757141},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4574818015098572},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.43143516778945923},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4171808362007141},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34761542081832886},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23112016916275024},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.22719699144363403},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.18397986888885498},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.17634665966033936},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16056358814239502},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15116393566131592},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08963072299957275},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1669112.1669128","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1669112.1669128","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1194132388","display_name":null,"funder_award_id":"TIN2007-61763","funder_id":"https://openalex.org/F4320321764","funder_display_name":"Ministerio de Educaci\u00f3n, Cultura y Deporte"},{"id":"https://openalex.org/G425654886","display_name":null,"funder_award_id":"2009SGR1250","funder_id":"https://openalex.org/F4320321505","funder_display_name":"Generalitat de Catalunya"}],"funders":[{"id":"https://openalex.org/F4320321505","display_name":"Generalitat de Catalunya","ror":"https://ror.org/01bg62x04"},{"id":"https://openalex.org/F4320321764","display_name":"Ministerio de Educaci\u00f3n, Cultura y Deporte","ror":"https://ror.org/03nc27g21"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1968597908","https://openalex.org/W1977765666","https://openalex.org/W2001714442","https://openalex.org/W2014296507","https://openalex.org/W2025474944","https://openalex.org/W2033443176","https://openalex.org/W2052839611","https://openalex.org/W2106780604","https://openalex.org/W2112776829","https://openalex.org/W2113362353","https://openalex.org/W2129763083","https://openalex.org/W2141971978","https://openalex.org/W2142598547","https://openalex.org/W2143668295","https://openalex.org/W2145148378","https://openalex.org/W2149009819","https://openalex.org/W2149368334","https://openalex.org/W2157275977","https://openalex.org/W2161197576","https://openalex.org/W2537294823","https://openalex.org/W2543171663","https://openalex.org/W2798214469","https://openalex.org/W4238002809","https://openalex.org/W6653822147"],"related_works":["https://openalex.org/W2089002058","https://openalex.org/W1909296377","https://openalex.org/W3185029353","https://openalex.org/W3116379964","https://openalex.org/W2766443086","https://openalex.org/W2915176329","https://openalex.org/W2793465010","https://openalex.org/W2967161359","https://openalex.org/W2208608937","https://openalex.org/W1744689038"],"abstract_inverted_index":{"Transistors":[0],"per":[1],"area":[2],"unit":[3],"double":[4],"in":[5,29,66,88],"every":[6],"new":[7,32],"technology":[8,33],"node.":[9],"However,":[10],"the":[11,51,62],"electric":[12],"field":[13],"density":[14],"and":[15,39,55,58,78],"power":[16,41],"demand":[17,42],"grow":[18],"if":[19],"Vcc":[20,25,48],"is":[21,85],"not":[22],"scaled.":[23],"Therefore,":[24],"must":[26],"be":[27],"scaled":[28],"pace":[30],"with":[31],"nodes":[34],"to":[35],"prevent":[36],"excessive":[37],"degradation":[38],"keep":[40],"within":[43],"reasonable":[44],"limits.":[45],"Unfortunately,":[46],"low":[47],"operation":[49],"exacerbates":[50],"effect":[52],"of":[53,64],"variations":[54],"decreases":[56],"noise":[57],"stability":[59],"margins,":[60],"increasing":[61],"likelihood":[63],"errors":[65,73],"SRAM":[67],"memories":[68],"such":[69],"as":[70],"caches.":[71],"Those":[72],"translate":[74],"into":[75],"performance":[76,79],"loss":[77],"variation":[80],"across":[81],"different":[82],"cores,":[83],"which":[84],"especially":[86],"undesirable":[87],"a":[89],"multi-core":[90],"processor.":[91]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":14},{"year":2013,"cited_by_count":11},{"year":2012,"cited_by_count":6}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}