{"id":"https://openalex.org/W2078596773","doi":"https://doi.org/10.1145/1645213.1645215","title":"Toward a science for future NoC design","display_name":"Toward a science for future NoC design","publication_year":2009,"publication_date":"2009-12-12","ids":{"openalex":"https://openalex.org/W2078596773","doi":"https://doi.org/10.1145/1645213.1645215","mag":"2078596773"},"language":"en","primary_location":{"id":"doi:10.1145/1645213.1645215","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1645213.1645215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Workshop on Network on Chip Architectures","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036227385","display_name":"Radu M\u0103rculescu","orcid":"https://orcid.org/0000-0003-1826-7646"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Radu Marculescu","raw_affiliation_strings":["Carnegie Mellon University","Carnegie Mellon Univ (USA)"],"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Carnegie Mellon Univ (USA)","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5036227385"],"corresponding_institution_ids":["https://openalex.org/I74973139"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13767672,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9876000285148621,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7131117582321167},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.655292272567749},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6162479519844055},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5514274835586548},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5391175746917725},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5078175663948059},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5008101463317871},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.48562827706336975},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.48527953028678894},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.47685301303863525},{"id":"https://openalex.org/keywords/point-to-point","display_name":"Point-to-point","score":0.4453830122947693},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4200219511985779},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.36523687839508057},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3204033374786377},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.2314847707748413},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19880303740501404},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.130339115858078},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09882313013076782}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7131117582321167},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.655292272567749},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6162479519844055},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5514274835586548},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5391175746917725},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5078175663948059},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5008101463317871},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.48562827706336975},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.48527953028678894},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.47685301303863525},{"id":"https://openalex.org/C174440990","wikidata":"https://www.wikidata.org/wiki/Q681349","display_name":"Point-to-point","level":2,"score":0.4453830122947693},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4200219511985779},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.36523687839508057},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3204033374786377},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.2314847707748413},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19880303740501404},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.130339115858078},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09882313013076782},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1645213.1645215","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1645213.1645215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Workshop on Network on Chip Architectures","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8899999856948853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4243132314","https://openalex.org/W2298526277","https://openalex.org/W2135981148","https://openalex.org/W2388672758","https://openalex.org/W2065289416","https://openalex.org/W2754086592","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W3198758847","https://openalex.org/W1966325333"],"abstract_inverted_index":{"Traditionally,":[0],"the":[1,10,14,20,34,37,46,53,69,74,97],"design":[2,35,75],"space":[3],"exploration":[4],"for":[5,107],"systems-on-chip":[6],"has":[7,100],"focused":[8],"on":[9,24],"computational":[11],"aspects":[12],"of":[13,22,36,52,60,71,92],"problem":[15,70],"at":[16],"hand.":[17],"However,":[18],"as":[19,103],"number":[21],"components":[23],"a":[25,41,57,104],"single":[26],"chip":[27],"and":[28,49,79,94],"their":[29],"performance":[30,95],"continue":[31],"to":[32,67],"increase,":[33],"communication":[38,87],"architecture":[39,99],"plays":[40],"major":[42],"role":[43],"in":[44,90],"defining":[45],"area,":[47],"performance,":[48],"energy":[50],"consumption":[51],"overall":[54],"system.":[55],"From":[56],"technology":[58],"point":[59],"view,":[61],"this":[62],"paradigm":[63],"shift":[64],"is":[65],"meant":[66],"mitigate":[68],"interconnects,":[72],"keep":[73],"complexity":[76],"under":[77],"control,":[78],"reduce":[80],"costs.":[81],"Since":[82],"neither":[83],"point-to-point,":[84],"nor":[85],"bus-based":[86],"scale":[88],"well":[89],"terms":[91],"power":[93],"figures,":[96],"network-on-chip":[98],"been":[101],"suggested":[102],"promising":[105],"solution":[106],"future":[108],"multicore":[109],"systems.":[110]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}