{"id":"https://openalex.org/W2001740056","doi":"https://doi.org/10.1145/1629911.1630078","title":"The day Sherlock Holmes decided to do EDA","display_name":"The day Sherlock Holmes decided to do EDA","publication_year":2009,"publication_date":"2009-07-26","ids":{"openalex":"https://openalex.org/W2001740056","doi":"https://doi.org/10.1145/1629911.1630078","mag":"2001740056"},"language":"en","primary_location":{"id":"doi:10.1145/1629911.1630078","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1629911.1630078","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 46th Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009841786","display_name":"Andreas Veneris","orcid":"https://orcid.org/0000-0002-6309-8821"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Andreas Veneris","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada","University of Toronto, ECE Dept. & CS Dept., ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto, ECE Dept. & CS Dept., ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111477668","display_name":"Sean Safarpour","orcid":null},"institutions":[{"id":"https://openalex.org/I4210091770","display_name":"Vennsa Technologies (Canada)","ror":"https://ror.org/00dyyan63","country_code":"CA","type":"company","lineage":["https://openalex.org/I4210091770"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Sean Safarpour","raw_affiliation_strings":["Vennsa Technologies, Inc., Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Vennsa Technologies, Inc., Toronto, ON, Canada","institution_ids":["https://openalex.org/I4210091770"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5009841786"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":0.536,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.66057738,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"631","last_page":"634"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.9237833023071289},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6933567523956299},{"id":"https://openalex.org/keywords/complement","display_name":"Complement (music)","score":0.5959886312484741},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.5532521605491638},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5105694532394409},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.45575445890426636},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43184155225753784},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3989899158477783},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36606109142303467},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09409546852111816}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.9237833023071289},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6933567523956299},{"id":"https://openalex.org/C112313634","wikidata":"https://www.wikidata.org/wiki/Q7886648","display_name":"Complement (music)","level":5,"score":0.5959886312484741},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.5532521605491638},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5105694532394409},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.45575445890426636},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43184155225753784},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3989899158477783},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36606109142303467},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09409546852111816},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C127716648","wikidata":"https://www.wikidata.org/wiki/Q104053","display_name":"Phenotype","level":3,"score":0.0},{"id":"https://openalex.org/C188082640","wikidata":"https://www.wikidata.org/wiki/Q1780899","display_name":"Complementation","level":4,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1629911.1630078","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1629911.1630078","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 46th Annual Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.152.3424","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.152.3424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eecg.utoronto.ca/~veneris/9dac.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W67485690","https://openalex.org/W145608659","https://openalex.org/W1513012091","https://openalex.org/W1602612484","https://openalex.org/W1963105722","https://openalex.org/W1977375970","https://openalex.org/W1979903718","https://openalex.org/W1988635588","https://openalex.org/W2032056221","https://openalex.org/W2075927280","https://openalex.org/W2080267935","https://openalex.org/W2096541971","https://openalex.org/W2097136089","https://openalex.org/W2098552614","https://openalex.org/W2127735256","https://openalex.org/W2134886801","https://openalex.org/W2135523993","https://openalex.org/W2144058903","https://openalex.org/W2148397050","https://openalex.org/W2163601989","https://openalex.org/W3150324789","https://openalex.org/W4239638504"],"related_works":["https://openalex.org/W4321442002","https://openalex.org/W2015265939","https://openalex.org/W2284072287","https://openalex.org/W2611067230","https://openalex.org/W2480201319","https://openalex.org/W2387706296","https://openalex.org/W2155788121","https://openalex.org/W4235469518","https://openalex.org/W362492756","https://openalex.org/W2061417947"],"abstract_inverted_index":{"Semiconductor":[0],"design":[1,9,17,32],"companies":[2],"are":[3],"in":[4],"a":[5],"continuous":[6],"search":[7],"for":[8,77],"tools":[10,81],"that":[11,34,38],"address":[12],"the":[13,31,53,57,62,66,71,90],"ever":[14],"increasing":[15],"chip":[16],"complexity":[18],"coupled":[19],"with":[20],"strict":[21],"time-to-market":[22],"schedules":[23],"and":[24,49,65,82,93],"budgetary":[25],"constraints.":[26],"A":[27],"fundamental":[28],"aspect":[29],"of":[30,39,56],"process":[33],"remains":[35],"primitive":[36],"is":[37,84],"debugging.":[40],"It":[41],"takes":[42],"months":[43],"to":[44,87],"close,":[45],"it":[46,50,69],"introduces":[47],"costs":[48],"may":[51],"jeopardize":[52],"release":[54],"date":[55],"chip.":[58],"This":[59],"paper":[60],"reviews":[61],"debugging":[63],"problem":[64],"research":[67],"behind":[68],"over":[70],"past":[72],"20":[73],"years.":[74],"The":[75],"case":[76],"automated":[78],"RTL":[79],"debug":[80],"methodologies":[83],"also":[85],"made":[86],"help":[88],"ease":[89],"manual":[91],"burden":[92],"complement":[94],"current":[95],"industrial":[96],"verification":[97],"practices.":[98]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}