{"id":"https://openalex.org/W2100661413","doi":"https://doi.org/10.1145/1629911.1630044","title":"Statistical reliability analysis under process variation and aging effects","display_name":"Statistical reliability analysis under process variation and aging effects","publication_year":2009,"publication_date":"2009-07-26","ids":{"openalex":"https://openalex.org/W2100661413","doi":"https://doi.org/10.1145/1629911.1630044","mag":"2100661413"},"language":"en","primary_location":{"id":"doi:10.1145/1629911.1630044","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1629911.1630044","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 46th Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081521266","display_name":"Yinghai Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yinghai Lu","raw_affiliation_strings":["Fudan University, China","State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"Fudan University, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004722925","display_name":"Li Shang","orcid":"https://orcid.org/0000-0003-3944-7531"},"institutions":[{"id":"https://openalex.org/I188538660","display_name":"University of Colorado Boulder","ror":"https://ror.org/02ttsq026","country_code":"US","type":"education","lineage":["https://openalex.org/I188538660"]},{"id":"https://openalex.org/I2802236040","display_name":"University of Colorado System","ror":"https://ror.org/00jc20583","country_code":"US","type":"education","lineage":["https://openalex.org/I2802236040"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Li Shang","raw_affiliation_strings":["University of Colorado, Boulder","ECEE, University of Colorado, Boulder, U.S.A"],"affiliations":[{"raw_affiliation_string":"University of Colorado, Boulder","institution_ids":["https://openalex.org/I2802236040","https://openalex.org/I188538660"]},{"raw_affiliation_string":"ECEE, University of Colorado, Boulder, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103038285","display_name":"Hai Zhou","orcid":"https://orcid.org/0000-0003-4824-7179"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hai Zhou","raw_affiliation_strings":["Fudan University, China and Northwestern University","State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"Fudan University, China and Northwestern University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020841047","display_name":"Hengliang Zhu","orcid":"https://orcid.org/0000-0002-0338-9256"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hengliang Zhu","raw_affiliation_strings":["Fudan University, China","State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"Fudan University, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045464812","display_name":"Fan Yang","orcid":"https://orcid.org/0000-0003-2164-8175"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Yang","raw_affiliation_strings":["Fudan University, China","State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"Fudan University, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064213921","display_name":"Xuan Zeng","orcid":"https://orcid.org/0000-0002-8097-4053"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuan Zeng","raw_affiliation_strings":["Fudan University, China","State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China"],"affiliations":[{"raw_affiliation_string":"Fudan University, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5081521266"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210132426"],"apc_list":null,"apc_paid":null,"fwci":7.0107,"has_fulltext":false,"cited_by_count":101,"citation_normalized_percentile":{"value":0.97260912,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"514","last_page":"519"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7760392427444458},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.7322385907173157},{"id":"https://openalex.org/keywords/circuit-reliability","display_name":"Circuit reliability","score":0.7072137594223022},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.6253485083580017},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.547642707824707},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5071876049041748},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4974382221698761},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4516810178756714},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4488148093223572},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.4188452363014221},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.41747811436653137},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38702404499053955},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.22563451528549194},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19717800617218018},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.16725370287895203},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15944504737854004},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.11373931169509888},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.11204567551612854}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7760392427444458},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.7322385907173157},{"id":"https://openalex.org/C2778309119","wikidata":"https://www.wikidata.org/wiki/Q5121614","display_name":"Circuit reliability","level":4,"score":0.7072137594223022},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.6253485083580017},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.547642707824707},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5071876049041748},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4974382221698761},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4516810178756714},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4488148093223572},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.4188452363014221},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.41747811436653137},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38702404499053955},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.22563451528549194},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19717800617218018},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.16725370287895203},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15944504737854004},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.11373931169509888},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.11204567551612854},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1629911.1630044","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1629911.1630044","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 46th Annual Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.473.8050","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.473.8050","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://users.eecs.northwestern.edu/~haizhou/publications/dac09lu1.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1049864938","display_name":null,"funder_award_id":"CCF-0811270","funder_id":"https://openalex.org/F4320337387","funder_display_name":"Division of Computing and Communication Foundations"},{"id":"https://openalex.org/G1326144771","display_name":null,"funder_award_id":"2005CB321701","funder_id":"https://openalex.org/F4320321540","funder_display_name":"Ministry of Science and Technology of the People's Republic of China"},{"id":"https://openalex.org/G2731134420","display_name":null,"funder_award_id":"2007-HJ-15932007-TJ-1589","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G6696681808","display_name":null,"funder_award_id":"8510700100","funder_id":"https://openalex.org/F4320321540","funder_display_name":"Ministry of Science and Technology of the People's Republic of China"},{"id":"https://openalex.org/G7080421446","display_name":null,"funder_award_id":"6.07E+15","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8708529866","display_name":null,"funder_award_id":"2.01E+11","funder_id":"https://openalex.org/F4320321106","funder_display_name":"Ministry of Education of the People's Republic of China"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320321106","display_name":"Ministry of Education of the People's Republic of China","ror":"https://ror.org/01mv9t934"},{"id":"https://openalex.org/F4320321540","display_name":"Ministry of Science and Technology of the People's Republic of China","ror":"https://ror.org/027s68j25"},{"id":"https://openalex.org/F4320337387","display_name":"Division of Computing and Communication Foundations","ror":"https://ror.org/01mng8331"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1498699371","https://openalex.org/W1569550779","https://openalex.org/W1991431227","https://openalex.org/W2041424982","https://openalex.org/W2065183790","https://openalex.org/W2068870507","https://openalex.org/W2100362001","https://openalex.org/W2102729267","https://openalex.org/W2103792078","https://openalex.org/W2113728962","https://openalex.org/W2119125081","https://openalex.org/W2120116751","https://openalex.org/W2123489707","https://openalex.org/W2124563469","https://openalex.org/W2126298267","https://openalex.org/W2127513491","https://openalex.org/W2127877371","https://openalex.org/W2134067926","https://openalex.org/W2135748666","https://openalex.org/W2136092716","https://openalex.org/W2144651789","https://openalex.org/W2156064231","https://openalex.org/W2158812231","https://openalex.org/W2164178706","https://openalex.org/W2165740397"],"related_works":["https://openalex.org/W1970920853","https://openalex.org/W4293235276","https://openalex.org/W2099679924","https://openalex.org/W2738622559","https://openalex.org/W1977755957","https://openalex.org/W2117533672","https://openalex.org/W2115165828","https://openalex.org/W2126298267","https://openalex.org/W1982822282","https://openalex.org/W2076372184"],"abstract_inverted_index":{"Circuit":[0],"reliability":[1,34,53,148],"is":[2,111],"affected":[3],"by":[4,58],"various":[5],"fabrication-time":[6],"and":[7,19,33,67,83,93,138,150],"run-time":[8,38,68],"effects.":[9,70],"Fabrication-induced":[10],"process":[11,65,91],"variation":[12,66,82,92],"has":[13,134],"significant":[14],"impact":[15,62,85],"on":[16,76,86],"circuit":[17,37,78,87,117,129,146],"performance":[18,32],"reliability.":[20],"Various":[21],"aging":[22,69,102],"effects,":[23],"such":[24],"as":[25,120,122],"negative":[26,95],"bias":[27,96],"temperature":[28,97],"instability,":[29],"cause":[30],"continuous":[31],"degradation":[35],"during":[36],"usage.":[39],"In":[40],"this":[41],"work,":[42],"we":[43],"present":[44],"a":[45,100],"statistical":[46],"analysis":[47,132,149],"framework":[48,133],"that":[49],"characterizes":[50],"the":[51,61,94,115,125],"lifetime":[52,81,118,147],"of":[54,63,113,127],"nanometer-scale":[55,105],"integrated":[56,106,139],"circuits":[57],"jointly":[59],"considering":[60],"fabrication-induced":[64],"More":[71],"specifically,":[72],"our":[73],"work":[74,110],"focuses":[75],"characterizing":[77,114],"threshold":[79],"voltage":[80],"its":[84],"timing":[88],"due":[89],"to":[90],"instability":[98],"effect,":[99],"primary":[101],"effect":[103],"in":[104],"circuits.":[107],"The":[108],"proposed":[109],"capable":[112],"overall":[116],"reliability,":[119],"well":[121],"efficiently":[123],"quantifying":[124],"vulnerabilities":[126],"individual":[128],"elements.":[130],"This":[131],"been":[135],"carefully":[136],"validated":[137],"into":[140],"an":[141],"iterative":[142],"design":[143],"flow":[144],"for":[145],"optimization.":[151]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":9},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":11},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":17},{"year":2012,"cited_by_count":9}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}