{"id":"https://openalex.org/W2074099885","doi":"https://doi.org/10.1145/1596532.1596536","title":"Application development with the FlexWAFE real-time stream processing architecture for FPGAs","display_name":"Application development with the FlexWAFE real-time stream processing architecture for FPGAs","publication_year":2009,"publication_date":"2009-10-01","ids":{"openalex":"https://openalex.org/W2074099885","doi":"https://doi.org/10.1145/1596532.1596536","mag":"2074099885"},"language":"en","primary_location":{"id":"doi:10.1145/1596532.1596536","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1596532.1596536","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060020941","display_name":"Amilcar do Carmo Lucas","orcid":null},"institutions":[{"id":"https://openalex.org/I94509681","display_name":"Technische Universit\u00e4t Braunschweig","ror":"https://ror.org/010nsgg66","country_code":"DE","type":"education","lineage":["https://openalex.org/I94509681"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Amilcar Do Carmo Lucas","raw_affiliation_strings":["Technical University of Braunschweig, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Braunschweig, Germany","institution_ids":["https://openalex.org/I94509681"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027738436","display_name":"Henning Sahlbach","orcid":null},"institutions":[{"id":"https://openalex.org/I94509681","display_name":"Technische Universit\u00e4t Braunschweig","ror":"https://ror.org/010nsgg66","country_code":"DE","type":"education","lineage":["https://openalex.org/I94509681"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Henning Sahlbach","raw_affiliation_strings":["Technical University of Braunschweig, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Braunschweig, Germany","institution_ids":["https://openalex.org/I94509681"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085312246","display_name":"Sean Whitty","orcid":null},"institutions":[{"id":"https://openalex.org/I94509681","display_name":"Technische Universit\u00e4t Braunschweig","ror":"https://ror.org/010nsgg66","country_code":"DE","type":"education","lineage":["https://openalex.org/I94509681"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sean Whitty","raw_affiliation_strings":["Technical University of Braunschweig, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Braunschweig, Germany","institution_ids":["https://openalex.org/I94509681"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088398746","display_name":"Sven Heithecker","orcid":null},"institutions":[{"id":"https://openalex.org/I94509681","display_name":"Technische Universit\u00e4t Braunschweig","ror":"https://ror.org/010nsgg66","country_code":"DE","type":"education","lineage":["https://openalex.org/I94509681"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sven Heithecker","raw_affiliation_strings":["Technical University of Braunschweig, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Braunschweig, Germany","institution_ids":["https://openalex.org/I94509681"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075507551","display_name":"Rolf Ernst","orcid":"https://orcid.org/0000-0003-2414-9566"},"institutions":[{"id":"https://openalex.org/I94509681","display_name":"Technische Universit\u00e4t Braunschweig","ror":"https://ror.org/010nsgg66","country_code":"DE","type":"education","lineage":["https://openalex.org/I94509681"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rolf Ernst","raw_affiliation_strings":["Technical University of Braunschweig, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Braunschweig, Germany","institution_ids":["https://openalex.org/I94509681"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5060020941"],"corresponding_institution_ids":["https://openalex.org/I94509681"],"apc_list":null,"apc_paid":null,"fwci":2.4119,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.89029815,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"9","issue":"1","first_page":"1","last_page":"23"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.825011134147644},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8208788633346558},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.624351441860199},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.545997142791748},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5375689268112183},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46602487564086914},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.4590619206428528},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.45857980847358704},{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.45807692408561707},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.44117990136146545},{"id":"https://openalex.org/keywords/digital-image-processing","display_name":"Digital image processing","score":0.42267730832099915},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35610154271125793},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.1748623549938202},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10682708024978638}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.825011134147644},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8208788633346558},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.624351441860199},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.545997142791748},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5375689268112183},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46602487564086914},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.4590619206428528},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.45857980847358704},{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.45807692408561707},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.44117990136146545},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.42267730832099915},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35610154271125793},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.1748623549938202},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10682708024978638},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1596532.1596536","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1596532.1596536","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1585223597","https://openalex.org/W1587231161","https://openalex.org/W1949412827","https://openalex.org/W1994061133","https://openalex.org/W2031144446","https://openalex.org/W2034248530","https://openalex.org/W2051542972","https://openalex.org/W2059807497","https://openalex.org/W2087441910","https://openalex.org/W2091158003","https://openalex.org/W2100193711","https://openalex.org/W2100644292","https://openalex.org/W2103142032","https://openalex.org/W2114295495","https://openalex.org/W2115172404","https://openalex.org/W2116793508","https://openalex.org/W2121844610","https://openalex.org/W2122553532","https://openalex.org/W2127322963","https://openalex.org/W2139989659","https://openalex.org/W2143714984","https://openalex.org/W2150771994","https://openalex.org/W2164701340","https://openalex.org/W2166697045","https://openalex.org/W2167240608","https://openalex.org/W2171177692","https://openalex.org/W2172015690","https://openalex.org/W2327490923"],"related_works":["https://openalex.org/W2386230482","https://openalex.org/W2371310357","https://openalex.org/W2066459403","https://openalex.org/W2373039468","https://openalex.org/W2356859146","https://openalex.org/W2351225324","https://openalex.org/W1997579358","https://openalex.org/W2058520863","https://openalex.org/W2392915199","https://openalex.org/W3194663234"],"abstract_inverted_index":{"The":[0],"challenges":[1],"posed":[2],"by":[3,15],"complex":[4],"real-time":[5],"digital":[6],"image":[7,101],"processing":[8,27,64],"at":[9,103],"high":[10,79],"resolutions":[11],"cannot":[12],"be":[13],"met":[14],"current":[16],"state-of-the-art":[17],"general-purpose":[18],"or":[19],"DSP":[20],"processors,":[21],"due":[22],"to":[23,41],"the":[24,30,43,118],"lack":[25],"of":[26,35,45,56,59],"power.":[28],"On":[29],"other":[31],"hand,":[32],"large":[33],"arrays":[34],"FPGA-based":[36],"accelerators":[37],"are":[38],"too":[39],"inefficient":[40],"cover":[42],"needs":[44],"cost":[46],"sensitive":[47],"professional":[48,93],"markets.":[49],"We":[50,87],"present":[51],"a":[52,57,92,125],"new":[53],"architecture":[54,74,120],"composed":[55],"network":[58],"configurable":[60],"flexible":[61],"weakly":[62],"programmable":[63,68],"elements,":[65],"Flexible":[66],"Weakly":[67],"Advanced":[69],"Film":[70],"Engine":[71],"(FlexWAFE).":[72],"This":[73,113],"delivers":[75],"both":[76],"programmability":[77],"and":[78,122],"efficiency":[80],"when":[81],"implemented":[82],"on":[83,108,117,124],"an":[84],"FPGA":[85,105],"basis.":[86],"demonstrate":[88],"these":[89],"claims":[90],"using":[91],"next-generation":[94],"noise":[95],"reducer":[96],"with":[97],"more":[98],"than":[99],"170G":[100],"operations/s":[102],"80%":[104],"area":[106],"utilization":[107],"four":[109],"Virtex":[110],"II-Pro":[111],"FPGAs.":[112],"article":[114],"will":[115],"focus":[116],"FlexWAFE":[119],"principle":[121],"implementation":[123],"PCI-Express":[126],"board.":[127]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}