{"id":"https://openalex.org/W1991752686","doi":"https://doi.org/10.1145/1594233.1594273","title":"Circuit design in nano-scale CMOS era","display_name":"Circuit design in nano-scale CMOS era","publication_year":2009,"publication_date":"2009-08-19","ids":{"openalex":"https://openalex.org/W1991752686","doi":"https://doi.org/10.1145/1594233.1594273","mag":"1991752686"},"language":"en","primary_location":{"id":"doi:10.1145/1594233.1594273","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1594233.1594273","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100629178","display_name":"Guomin Zhang","orcid":"https://orcid.org/0000-0002-3503-7431"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kevin Zhang","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5100629178"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0684596,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"157","last_page":"158"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6771119236946106},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6168943643569946},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5732820630073547},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5492265224456787},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5315974354743958},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5263016223907471},{"id":"https://openalex.org/keywords/miniaturization","display_name":"Miniaturization","score":0.5197914838790894},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4976508915424347},{"id":"https://openalex.org/keywords/moores-law","display_name":"Moore's law","score":0.4935544729232788},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4925561547279358},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4651791751384735},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.46223053336143494},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.41728681325912476},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4172274172306061},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4077216386795044},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3031659722328186},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28018322587013245},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2189551293849945}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6771119236946106},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6168943643569946},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5732820630073547},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5492265224456787},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5315974354743958},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5263016223907471},{"id":"https://openalex.org/C57528182","wikidata":"https://www.wikidata.org/wiki/Q1271842","display_name":"Miniaturization","level":2,"score":0.5197914838790894},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4976508915424347},{"id":"https://openalex.org/C206891323","wikidata":"https://www.wikidata.org/wiki/Q178655","display_name":"Moore's law","level":2,"score":0.4935544729232788},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4925561547279358},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4651791751384735},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.46223053336143494},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.41728681325912476},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4172274172306061},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4077216386795044},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3031659722328186},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28018322587013245},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2189551293849945},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1594233.1594273","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1594233.1594273","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4253195573","https://openalex.org/W2020934033","https://openalex.org/W2743305891","https://openalex.org/W2126983197","https://openalex.org/W2070693700","https://openalex.org/W2078506771","https://openalex.org/W2908947570","https://openalex.org/W4391382037","https://openalex.org/W2374651972","https://openalex.org/W2134664711"],"abstract_inverted_index":{"Moore's":[0],"law":[1],"has":[2,20,48,116],"driven":[3],"today's":[4,163],"CMOS":[5,46,219],"technology":[6,18,109,133,230],"well":[7],"into":[8],"the":[9,16,22,27,36,43,93,102,105,108,120,129,159,184,212],"nano-scale":[10],"regime.":[11],"For":[12],"over":[13],"four":[14],"decades,":[15],"relentless":[17],"scaling":[19,110,134,160,171,208],"been":[21],"main":[23],"growth":[24],"engine":[25],"for":[26,119,172,183],"semiconductor":[28],"industry":[29],"in":[30,57,78,91,100,122,218,226],"bringing":[31],"out":[32],"ever-increasing":[33],"performance":[34,66],"to":[35,50,62,205],"end-user":[37],"while":[38,210],"lowering":[39],"product":[40],"cost.":[41],"But":[42],"miniaturization":[44],"of":[45,104,131,178,228],"transistor":[47],"led":[49],"many":[51],"new":[52],"challenges":[53,161],"and":[54,65,82,113,176,187],"increasing":[55],"difficulties":[56],"achieving":[58,101],"robust":[59],"circuit":[60,151,181,220],"design":[61,106,114,191,221],"meet":[63],"power":[64,168],"needs":[67],"along":[68,136,145,193],"with":[69,137,146,194],"high-volume":[70],"manufacturing":[71],"(HVM)":[72],"requirements.":[73,214],"It":[74],"is":[75],"particularly":[76],"challenging":[77],"designing":[79],"embedded":[80],"memory":[81],"analog":[83,180],"circuits":[84],"on":[85,149,158,203],"a":[86,97],"leading":[87],"edge":[88],"logic":[89,188],"process":[90,139,195],"which":[92],"transistor-induced":[94],"variations":[95],"pose":[96],"growing":[98],"hurdle":[99],"robustness":[103,177],"as":[107,201],"continues.":[111],"Technology":[112],"co-optimization":[115],"become":[117],"essential":[118],"success":[121],"developing":[123],"future":[124,216],"VLSI":[125,164],"circuits.In":[126],"this":[127],"talk,":[128],"state":[130],"current":[132],"trend":[135],"key":[138,179],"innovations":[140],"will":[141,155,197,222],"be":[142,198,224],"first":[143],"discussed,":[144],"their":[147],"impacts":[148],"fundamental":[150],"design.":[152],"The":[153,215],"presentation":[154],"then":[156,223],"focus":[157],"facing":[162],"circuits,":[165],"including":[166],"overall":[167],"management,":[169],"voltage":[170],"on-die":[173],"SRAM":[174],"design,":[175],"blocks":[182],"state-of-the-art":[185],"CPU":[186],"applications.":[189],"Innovative":[190],"solutions":[192],"optimization":[196],"thoroughly":[199],"discussed":[200,225],"examples":[202],"how":[204],"achieve":[206],"optimal":[207],"benefits":[209],"meeting":[211],"HVM":[213],"direction":[217],"light":[227],"continuous":[229],"scaling.":[231]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
