{"id":"https://openalex.org/W2037603745","doi":"https://doi.org/10.1145/1594233.1594261","title":"A 0.9V, 65nm logic-compatible embedded DRAM with &gt; 1ms data retention time and 53% less static power than a power-gated SRAM","display_name":"A 0.9V, 65nm logic-compatible embedded DRAM with &gt; 1ms data retention time and 53% less static power than a power-gated SRAM","publication_year":2009,"publication_date":"2009-08-19","ids":{"openalex":"https://openalex.org/W2037603745","doi":"https://doi.org/10.1145/1594233.1594261","mag":"2037603745"},"language":"en","primary_location":{"id":"doi:10.1145/1594233.1594261","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1594233.1594261","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006677805","display_name":"Ki Chul Chun","orcid":null},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ki Chul Chun","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA",", University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":", University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023812483","display_name":"Pulkit Jain","orcid":"https://orcid.org/0000-0001-5708-9761"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pulkit Jain","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA",", University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":", University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043025421","display_name":"Chris H. Kim","orcid":"https://orcid.org/0000-0002-4194-1347"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chris H. Kim","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA",", University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":", University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5006677805"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":0.2991,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.61394565,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"119","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/data-retention","display_name":"Data retention","score":0.859099268913269},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7889174818992615},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6586042642593384},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.6104834079742432},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6061296463012695},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5919398069381714},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5211663246154785},{"id":"https://openalex.org/keywords/retention-time","display_name":"Retention time","score":0.5093985199928284},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.497113972902298},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.49280884861946106},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4428214430809021},{"id":"https://openalex.org/keywords/pull-up-resistor","display_name":"Pull-up resistor","score":0.41267693042755127},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3773127794265747},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32283467054367065},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28693628311157227},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.2812933623790741},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.26297032833099365},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21835863590240479},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13565701246261597}],"concepts":[{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.859099268913269},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7889174818992615},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6586042642593384},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.6104834079742432},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6061296463012695},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5919398069381714},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5211663246154785},{"id":"https://openalex.org/C3020018676","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Retention time","level":2,"score":0.5093985199928284},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.497113972902298},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.49280884861946106},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4428214430809021},{"id":"https://openalex.org/C61818909","wikidata":"https://www.wikidata.org/wiki/Q1987617","display_name":"Pull-up resistor","level":5,"score":0.41267693042755127},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3773127794265747},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32283467054367065},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28693628311157227},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2812933623790741},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.26297032833099365},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21835863590240479},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13565701246261597},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C43617362","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Chromatography","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1594233.1594261","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1594233.1594261","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1491237044","https://openalex.org/W1964061332","https://openalex.org/W1996086722","https://openalex.org/W2038061869","https://openalex.org/W2062419791","https://openalex.org/W2094662129","https://openalex.org/W2099069607","https://openalex.org/W2110134128","https://openalex.org/W2122435992","https://openalex.org/W2124679907","https://openalex.org/W2182232625"],"related_works":["https://openalex.org/W2074922484","https://openalex.org/W1530056031","https://openalex.org/W3004383742","https://openalex.org/W2063061014","https://openalex.org/W4382618663","https://openalex.org/W2105633922","https://openalex.org/W2007079691","https://openalex.org/W1983178358","https://openalex.org/W838776354","https://openalex.org/W3161593307"],"abstract_inverted_index":{"A":[0,26,38],"logic-compatible":[1],"low":[2],"power":[3,19],"eDRAM":[4],"is":[5],"demonstrated":[6],"in":[7],"65nm":[8],"CMOS":[9],"achieving":[10],"a":[11,17,44],"retention":[12,33],"time":[13,34],"of":[14,21],"1.25msec":[15],"and":[16,35,43,53],"static":[18],"dissipation":[20],"91.3\u00b5W/Mb":[22],"at":[23],"0.9V,":[24],"85\u00baC.":[25],"boosted":[27],"3T":[28],"gain":[29],"cell":[30],"enhances":[31],"data":[32],"read":[36,45],"speed.":[37],"regulated":[39],"bit-line":[40],"write":[41,50],"scheme":[42],"reference":[46],"bias":[47],"generator":[48],"mitigate":[49],"disturbance":[51],"issues":[52],"improve":[54],"tolerance":[55],"to":[56],"PVT":[57],"variations.":[58]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
