{"id":"https://openalex.org/W2094571272","doi":"https://doi.org/10.1145/1582710.1582713","title":"Tetris-XL","display_name":"Tetris-XL","publication_year":2009,"publication_date":"2009-09-01","ids":{"openalex":"https://openalex.org/W2094571272","doi":"https://doi.org/10.1145/1582710.1582713","mag":"2094571272"},"language":"en","primary_location":{"id":"doi:10.1145/1582710.1582713","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1582710.1582713","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1582710.1582713","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://dl.acm.org/doi/pdf/10.1145/1582710.1582713","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031477814","display_name":"Weifeng Xu","orcid":"https://orcid.org/0000-0002-1313-1136"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Weifeng Xu","raw_affiliation_strings":["University of Massachusetts Amherst, Amherst, MA"],"affiliations":[{"raw_affiliation_string":"University of Massachusetts Amherst, Amherst, MA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012168703","display_name":"Russell Tessier","orcid":"https://orcid.org/0000-0003-0591-7566"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Russell Tessier","raw_affiliation_strings":["University of Massachusetts Amherst, Amherst, MA"],"affiliations":[{"raw_affiliation_string":"University of Massachusetts Amherst, Amherst, MA","institution_ids":["https://openalex.org/I24603500"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5031477814"],"corresponding_institution_ids":["https://openalex.org/I24603500"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.11765263,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"6","issue":"3","first_page":"1","last_page":"40"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.9713659882545471},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9073209762573242},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.7665361166000366},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.678124189376831},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6618669629096985},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5973585844039917},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5608728528022766},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.5582216382026672},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.43755805492401123},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4145495593547821},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.4107048213481903},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.2397153675556183},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13239508867263794},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.1292758584022522},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12110128998756409}],"concepts":[{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.9713659882545471},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9073209762573242},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.7665361166000366},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.678124189376831},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6618669629096985},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5973585844039917},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5608728528022766},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.5582216382026672},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.43755805492401123},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4145495593547821},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.4107048213481903},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.2397153675556183},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13239508867263794},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.1292758584022522},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12110128998756409},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1582710.1582713","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1582710.1582713","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1582710.1582713","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},{"id":"pmh:oai:scholarworks.umass.edu:20.500.14394/20771","is_oa":false,"landing_page_url":"https://hdl.handle.net/20.500.14394/20771","pdf_url":null,"source":{"id":"https://openalex.org/S4306402057","display_name":"Scholarworks (University of Massachusetts Amherst)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I24603500","host_organization_name":"University of Massachusetts Amherst","host_organization_lineage":["https://openalex.org/I24603500"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"published","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1145/1582710.1582713","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1582710.1582713","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1582710.1582713","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8199999928474426}],"awards":[{"id":"https://openalex.org/G2946788298","display_name":null,"funder_award_id":"CCR-9988238","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G6185843121","display_name":"Adaptive Systems-on-a-Chip for Low-Power Signal Processing","funder_award_id":"9988238","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G848032724","display_name":null,"funder_award_id":"Science","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2094571272.pdf","grobid_xml":"https://content.openalex.org/works/W2094571272.grobid-xml"},"referenced_works_count":33,"referenced_works":["https://openalex.org/W163216920","https://openalex.org/W172319129","https://openalex.org/W1498962072","https://openalex.org/W1510117796","https://openalex.org/W1523901979","https://openalex.org/W1538592187","https://openalex.org/W1555915743","https://openalex.org/W1570671539","https://openalex.org/W1585371887","https://openalex.org/W1997230820","https://openalex.org/W2035424898","https://openalex.org/W2035978244","https://openalex.org/W2044935944","https://openalex.org/W2058372704","https://openalex.org/W2066670963","https://openalex.org/W2078396000","https://openalex.org/W2094806828","https://openalex.org/W2106091351","https://openalex.org/W2117285153","https://openalex.org/W2118866757","https://openalex.org/W2122230401","https://openalex.org/W2137300667","https://openalex.org/W2140339776","https://openalex.org/W2152958194","https://openalex.org/W2171595223","https://openalex.org/W2752885492","https://openalex.org/W3140696287","https://openalex.org/W3145128584","https://openalex.org/W3147835733","https://openalex.org/W3148529197","https://openalex.org/W4236145149","https://openalex.org/W4250047106","https://openalex.org/W4254807835"],"related_works":["https://openalex.org/W1942542608","https://openalex.org/W2049342712","https://openalex.org/W2581286023","https://openalex.org/W2353958330","https://openalex.org/W2054117411","https://openalex.org/W4242411138","https://openalex.org/W2357256492","https://openalex.org/W3022819336","https://openalex.org/W2094571272","https://openalex.org/W2154968082"],"abstract_inverted_index":{"As":[0,39],"technology":[1],"has":[2,14,124],"advanced,":[3],"the":[4],"application":[5],"space":[6],"of":[7,20,138],"Very":[8],"Long":[9],"Instruction":[10],"Word":[11],"(VLIW)":[12],"processors":[13,33,157,180],"grown":[15],"to":[16,24,61,87],"include":[17],"a":[18,40,42,73,136],"variety":[19],"embedded":[21,31,139],"platforms.":[22],"Due":[23],"cost":[25],"and":[26,90,103,133,161,184],"power":[27],"consumption":[28],"constraints,":[29],"many":[30],"VLIW":[32,43,80,131,151,156,179],"contain":[34],"limited":[35],"resources,":[36],"including":[37],"registers.":[38],"result,":[41],"compiler":[44],"that":[45,78],"maximizes":[46],"instruction":[47,91,120],"level":[48],"parallelism":[49],"(ILP)":[50],"without":[51],"considering":[52],"register":[53,58,88,101],"constraints":[54],"may":[55],"generate":[56],"excessive":[57],"spills,":[59],"leading":[60],"reduced":[62],"overall":[63],"system":[64],"performance.":[65],"To":[66],"address":[67],"this":[68,70,148],"issue,":[69],"article":[71],"presents":[72],"new":[74],"spill":[75,168],"reduction":[76,102,169],"technique":[77,123,149],"improves":[79,150],"runtime":[81],"performance":[82,152],"by":[83,153],"reordering":[84],"operations":[85],"prior":[86,176],"allocation":[89],"scheduling.":[92,121],"Unlike":[93],"earlier":[94],"algorithms,":[95],"our":[96],"approach":[97],"explicitly":[98],"considers":[99],"both":[100],"data":[104],"dependency":[105,111],"in":[106],"performing":[107],"operation":[108],"reordering.":[109],"Data":[110],"control":[112],"limits":[113],"unexpected":[114],"schedule":[115],"length":[116],"increases":[117],"during":[118],"subsequent":[119],"Our":[122],"been":[125],"evaluated":[126,134],"using":[127,135],"Trimaran,":[128],"an":[129],"academic":[130],"compiler,":[132],"set":[137],"systems":[140],"benchmarks.":[141],"Experimental":[142],"results":[143],"show":[144],"that,":[145],"on":[146],"average,":[147],"10%":[154],"for":[155,178],"with":[158,166,181],"32":[159],"registers":[160,183],"8":[162,185],"functional":[163,186],"units":[164],"compared":[165],"previous":[167],"techniques.":[170],"Limited":[171],"improvement":[172],"is":[173],"seen":[174],"versus":[175],"approaches":[177],"64":[182],"units.":[187]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2016-06-24T00:00:00"}
