{"id":"https://openalex.org/W2015743564","doi":"https://doi.org/10.1145/1582379.1582676","title":"FPGA prototyping of a multi-million gate System-on-Chip (SoC) design for wireless USB applications","display_name":"FPGA prototyping of a multi-million gate System-on-Chip (SoC) design for wireless USB applications","publication_year":2009,"publication_date":"2009-06-21","ids":{"openalex":"https://openalex.org/W2015743564","doi":"https://doi.org/10.1145/1582379.1582676","mag":"2015743564"},"language":"en","primary_location":{"id":"doi:10.1145/1582379.1582676","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1582379.1582676","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 International Conference on Wireless Communications and Mobile Computing: Connecting the World Wirelessly","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113814941","display_name":"P. Subramanian","orcid":null},"institutions":[{"id":"https://openalex.org/I4210139030","display_name":"Samsung (India)","ror":"https://ror.org/04cpx2569","country_code":"IN","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210139030"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"P. Subramanian","raw_affiliation_strings":["Samsung India Software Operations, Bangalore, Karnataka, India","Samsung India Software Operations, Bangalore, Karnataka, India#TAB#"],"affiliations":[{"raw_affiliation_string":"Samsung India Software Operations, Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I4210139030"]},{"raw_affiliation_string":"Samsung India Software Operations, Bangalore, Karnataka, India#TAB#","institution_ids":["https://openalex.org/I4210139030"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039639091","display_name":"Jagonda Patil","orcid":null},"institutions":[{"id":"https://openalex.org/I4210139030","display_name":"Samsung (India)","ror":"https://ror.org/04cpx2569","country_code":"IN","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210139030"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Jagonda Patil","raw_affiliation_strings":["Samsung India Software Operations, Bangalore, Karnataka, India","Samsung India Software Operations, Bangalore, Karnataka, India#TAB#"],"affiliations":[{"raw_affiliation_string":"Samsung India Software Operations, Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I4210139030"]},{"raw_affiliation_string":"Samsung India Software Operations, Bangalore, Karnataka, India#TAB#","institution_ids":["https://openalex.org/I4210139030"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109247565","display_name":"Manish Saxena","orcid":null},"institutions":[{"id":"https://openalex.org/I4210139030","display_name":"Samsung (India)","ror":"https://ror.org/04cpx2569","country_code":"IN","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210139030"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manish Kumar Saxena","raw_affiliation_strings":["Samsung India Software Operations, Bangalore, Karnataka, India","Samsung India Software Operations, Bangalore, Karnataka, India#TAB#"],"affiliations":[{"raw_affiliation_string":"Samsung India Software Operations, Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I4210139030"]},{"raw_affiliation_string":"Samsung India Software Operations, Bangalore, Karnataka, India#TAB#","institution_ids":["https://openalex.org/I4210139030"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5113814941"],"corresponding_institution_ids":["https://openalex.org/I4210139030"],"apc_list":null,"apc_paid":null,"fwci":1.3191,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.80858411,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1355","last_page":"1358"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/usb","display_name":"USB","score":0.8853545188903809},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8096431493759155},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.7925785779953003},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7591125965118408},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6595486402511597},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5857570767402649},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5655759572982788},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.5536278486251831},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5340805053710938},{"id":"https://openalex.org/keywords/software-prototyping","display_name":"Software prototyping","score":0.46366220712661743},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.44767487049102783},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.4140459895133972},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3636168837547302},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3312285542488098},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3205520510673523},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.16378432512283325},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14261171221733093}],"concepts":[{"id":"https://openalex.org/C507366226","wikidata":"https://www.wikidata.org/wiki/Q42378","display_name":"USB","level":3,"score":0.8853545188903809},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8096431493759155},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.7925785779953003},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7591125965118408},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6595486402511597},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5857570767402649},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5655759572982788},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.5536278486251831},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5340805053710938},{"id":"https://openalex.org/C2776697782","wikidata":"https://www.wikidata.org/wiki/Q576460","display_name":"Software prototyping","level":4,"score":0.46366220712661743},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.44767487049102783},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.4140459895133972},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3636168837547302},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3312285542488098},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3205520510673523},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.16378432512283325},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14261171221733093},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1582379.1582676","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1582379.1582676","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 International Conference on Wireless Communications and Mobile Computing: Connecting the World Wirelessly","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6499999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2149247027","https://openalex.org/W2184003839","https://openalex.org/W2536156518"],"related_works":["https://openalex.org/W2007173547","https://openalex.org/W2997602288","https://openalex.org/W2152649261","https://openalex.org/W200899231","https://openalex.org/W2356927082","https://openalex.org/W2905116260","https://openalex.org/W2382673458","https://openalex.org/W3162338610","https://openalex.org/W2376218453","https://openalex.org/W2050556089"],"abstract_inverted_index":{"The":[0,60],"complexity":[1],"and":[2,29,48,78],"costs":[3],"involved":[4],"in":[5,44],"today's":[6],"SoC":[7,22,54],"designs":[8],"makes":[9],"Field":[10],"Programmable":[11],"Gate":[12],"Arrays":[13],"(FPGA's)":[14],"prototyping":[15,42,64],"of":[16,20,50,62,81],"ASIC's":[17],"as":[18,68],"means":[19],"pre-silicon":[21],"validation,":[23],"to":[24,30,66],"accelerate":[25],"system":[26],"software":[27],"development":[28,76],"meet":[31],"the":[32,45,63],"time-to-market":[33],"requirements.":[34],"In":[35],"this":[36],"paper,":[37],"we":[38],"present":[39],"a":[40,51,69],"FPGA":[41],"used":[43],"implementation,":[46],"verification":[47],"validation":[49,73],"multimillion":[52],"gate":[53],"designed":[55],"for":[56,71],"wireless":[57],"USB":[58],"application.":[59],"purpose":[61],"was":[65],"serve":[67],"method":[70],"architectural":[72],"which":[74],"reduces":[75],"cost":[77],"avoid":[79],"duplication":[80],"design":[82],"effort.":[83]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
