{"id":"https://openalex.org/W2019544283","doi":"https://doi.org/10.1145/1568485.1568486","title":"A study of asynchronous design methodology for robust CMOS-nano hybrid system design","display_name":"A study of asynchronous design methodology for robust CMOS-nano hybrid system design","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W2019544283","doi":"https://doi.org/10.1145/1568485.1568486","mag":"2019544283"},"language":"en","primary_location":{"id":"doi:10.1145/1568485.1568486","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1568485.1568486","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049426113","display_name":"Rajat Subhra Chakraborty","orcid":"https://orcid.org/0000-0003-3588-163X"},"institutions":[{"id":"https://openalex.org/I58956616","display_name":"Case Western Reserve University","ror":"https://ror.org/051fd9666","country_code":"US","type":"education","lineage":["https://openalex.org/I58956616"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rajat Subhra Chakraborty","raw_affiliation_strings":["Case Western Reserve University, Cleveland, OR","Case Western Reserve University, Cleveland, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Case Western Reserve University, Cleveland, OR","institution_ids":["https://openalex.org/I58956616"]},{"raw_affiliation_string":"Case Western Reserve University, Cleveland, OR#TAB#","institution_ids":["https://openalex.org/I58956616"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039442844","display_name":"Swarup Bhunia","orcid":"https://orcid.org/0000-0001-6082-6961"},"institutions":[{"id":"https://openalex.org/I58956616","display_name":"Case Western Reserve University","ror":"https://ror.org/051fd9666","country_code":"US","type":"education","lineage":["https://openalex.org/I58956616"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Swarup Bhunia","raw_affiliation_strings":["Case Western Reserve University, Cleveland, OR","Case Western Reserve University, Cleveland, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Case Western Reserve University, Cleveland, OR","institution_ids":["https://openalex.org/I58956616"]},{"raw_affiliation_string":"Case Western Reserve University, Cleveland, OR#TAB#","institution_ids":["https://openalex.org/I58956616"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5049426113"],"corresponding_institution_ids":["https://openalex.org/I58956616"],"apc_list":null,"apc_paid":null,"fwci":0.2991,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60933508,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":"3","first_page":"1","last_page":"22"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.6308512687683105},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6136743426322937},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.609779953956604},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6070227026939392},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5903551578521729},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5508997440338135},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5286058783531189},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5189309120178223},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33061134815216064},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32668814063072205},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.1335226595401764},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.12904000282287598},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.08543533086776733}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.6308512687683105},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6136743426322937},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.609779953956604},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6070227026939392},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5903551578521729},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5508997440338135},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5286058783531189},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5189309120178223},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33061134815216064},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32668814063072205},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.1335226595401764},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.12904000282287598},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.08543533086776733},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1568485.1568486","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1568485.1568486","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W196877078","https://openalex.org/W1481489746","https://openalex.org/W1965020427","https://openalex.org/W1985555064","https://openalex.org/W1993937043","https://openalex.org/W1999420559","https://openalex.org/W2003872791","https://openalex.org/W2022829874","https://openalex.org/W2025467801","https://openalex.org/W2047507725","https://openalex.org/W2050111978","https://openalex.org/W2061991384","https://openalex.org/W2072824436","https://openalex.org/W2078174680","https://openalex.org/W2111173832","https://openalex.org/W2114231460","https://openalex.org/W2129705722","https://openalex.org/W2130434989","https://openalex.org/W2136293553","https://openalex.org/W2137249916","https://openalex.org/W2139399616","https://openalex.org/W2146029118","https://openalex.org/W2147953779","https://openalex.org/W2150872535","https://openalex.org/W2162983760","https://openalex.org/W2167383670","https://openalex.org/W2170588525","https://openalex.org/W2487142227","https://openalex.org/W3190058962","https://openalex.org/W4231905827"],"related_works":["https://openalex.org/W1993985975","https://openalex.org/W1948903516","https://openalex.org/W3094139610","https://openalex.org/W2187164010","https://openalex.org/W4312516786","https://openalex.org/W2138474603","https://openalex.org/W2146990170","https://openalex.org/W937897205","https://openalex.org/W2085028021","https://openalex.org/W2086539401"],"abstract_inverted_index":{"Among":[0],"the":[1,96,101,142],"emerging":[2],"alternatives":[3],"to":[4,74,149,197],"CMOS,":[5],"molecular":[6,25,48,114],"electronics":[7],"based":[8],"diode-resistor":[9],"crossbar":[10,31,115],"fabric":[11],"has":[12],"generated":[13],"considerable":[14,182],"interest":[15],"in":[16,35,107,132,184],"recent":[17],"times.":[18],"Logic":[19],"circuit":[20,45,126,136],"design":[21,46,105,111,127,137,154],"with":[22],"future":[23],"nano-scale":[24],"devices":[26],"using":[27,47,113,166],"dense":[28],"and":[29,41,80,84,99,116,128,144,158,170,188,193],"regular":[30],"fabrics":[32],"is":[33],"promising":[34],"terms":[36,133,185],"of":[37,56,59,82,95,103,124,134,186],"integration":[38],"density,":[39],"performance":[40,187],"power":[42,194],"dissipation.":[43],"However,":[44],"switches":[49,61],"involve":[50],"some":[51,94],"major":[52],"challenges:":[53],"1)":[54],"lack":[55],"voltage":[57,69],"gain":[58],"these":[60],"that":[62,77],"prevents":[63],"logic":[64,168],"cascading;":[65],"2)":[66],"large":[67],"output":[68],"level":[70],"degradation;":[71],"3)":[72],"vulnerability":[73],"parameter":[75],"variations":[76],"affect":[78],"yield":[79],"robustness":[81,189],"operation;":[83],"4)":[85],"high":[86],"defect":[87],"rate.":[88],"In":[89],"this":[90],"article,":[91],"we":[92],"analyze":[93],"above":[97],"challenges":[98],"investigate":[100],"effectiveness":[102],"asynchronous":[104,125,153],"methodology":[106,143],"a":[108],"hybrid":[109],"system":[110,164],"platform":[112],"CMOS":[117,171],"interfacing":[118],"elements.":[119,174],"We":[120,139],"explore":[121],"different":[122,152,199],"approaches":[123,155],"compare":[129],"their":[130],"suitability":[131],"several":[135,179],"parameters.":[138],"then":[140],"develop":[141],"an":[145],"automated":[146],"synthesis":[147],"flow":[148],"support":[150],"two":[151,198],"(":[156],"Micropipelines":[157],"Four":[159],"phase":[160],"Dual-rail":[161],")":[162],"for":[163,178],"designs":[165],"nano-crossbar":[167],"stages":[169],"interface":[172],"data-storage":[173],"Circuit-level":[175],"simulation":[176],"results":[177],"benchmarks":[180],"show":[181],"advantage":[183],"at":[190],"moderate":[191],"area":[192],"overhead":[195],"compared":[196],"synchronous":[200],"implementations.":[201]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
