{"id":"https://openalex.org/W2092988200","doi":"https://doi.org/10.1145/1542275.1542342","title":"Rate-based QoS techniques for cache/memory in CMP platforms","display_name":"Rate-based QoS techniques for cache/memory in CMP platforms","publication_year":2009,"publication_date":"2009-06-08","ids":{"openalex":"https://openalex.org/W2092988200","doi":"https://doi.org/10.1145/1542275.1542342","mag":"2092988200"},"language":"en","primary_location":{"id":"doi:10.1145/1542275.1542342","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1542275.1542342","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd international conference on Supercomputing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Andrew Herdrich","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew Herdrich","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088669728","display_name":"Ramesh Illikkal","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ramesh Illikkal","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111987814","display_name":"Ravi Iyer","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ravi Iyer","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110280135","display_name":"Don Newell","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Don Newell","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058487266","display_name":"Vineet Chadha","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vineet Chadha","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041534663","display_name":"Jaideep Moses","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jaideep Moses","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":6.4015,"has_fulltext":false,"cited_by_count":77,"citation_normalized_percentile":{"value":0.97427337,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"479","last_page":"488"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8219237327575684},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.66025710105896},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5964285135269165},{"id":"https://openalex.org/keywords/quality-of-service","display_name":"Quality of service","score":0.5936585068702698},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.5032903552055359},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.4712189733982086},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.46137914061546326},{"id":"https://openalex.org/keywords/infiniband","display_name":"InfiniBand","score":0.4581235647201538},{"id":"https://openalex.org/keywords/resource-management","display_name":"Resource management (computing)","score":0.4213711619377136},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40838804841041565},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.34674280881881714},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3326810300350189},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3259352743625641},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2485564649105072},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.24803900718688965},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.23848369717597961},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09252995252609253}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8219237327575684},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.66025710105896},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5964285135269165},{"id":"https://openalex.org/C5119721","wikidata":"https://www.wikidata.org/wiki/Q220501","display_name":"Quality of service","level":2,"score":0.5936585068702698},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.5032903552055359},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.4712189733982086},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.46137914061546326},{"id":"https://openalex.org/C2781030343","wikidata":"https://www.wikidata.org/wiki/Q922437","display_name":"InfiniBand","level":2,"score":0.4581235647201538},{"id":"https://openalex.org/C2780609101","wikidata":"https://www.wikidata.org/wiki/Q17156588","display_name":"Resource management (computing)","level":2,"score":0.4213711619377136},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40838804841041565},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.34674280881881714},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3326810300350189},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3259352743625641},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2485564649105072},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.24803900718688965},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.23848369717597961},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09252995252609253},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1542275.1542342","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1542275.1542342","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd international conference on Supercomputing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1980419087","https://openalex.org/W1990000476","https://openalex.org/W1993694077","https://openalex.org/W1998310976","https://openalex.org/W2010843180","https://openalex.org/W2013129990","https://openalex.org/W2014809728","https://openalex.org/W2022740893","https://openalex.org/W2051525823","https://openalex.org/W2067649272","https://openalex.org/W2098040113","https://openalex.org/W2100552415","https://openalex.org/W2101903894","https://openalex.org/W2102871765","https://openalex.org/W2103115317","https://openalex.org/W2107223062","https://openalex.org/W2110398403","https://openalex.org/W2112806194","https://openalex.org/W2129816520","https://openalex.org/W2133508824","https://openalex.org/W2143773524","https://openalex.org/W2152061572","https://openalex.org/W2153204735","https://openalex.org/W2155396321","https://openalex.org/W2160293203","https://openalex.org/W2166697045","https://openalex.org/W3139989176"],"related_works":["https://openalex.org/W2167303720","https://openalex.org/W2086718556","https://openalex.org/W2070385207","https://openalex.org/W2012518269","https://openalex.org/W2157599672","https://openalex.org/W4243772489","https://openalex.org/W57688818","https://openalex.org/W2551263236","https://openalex.org/W1496086148","https://openalex.org/W2046128376"],"abstract_inverted_index":{"As":[0],"we":[1,9,78],"embrace":[2],"the":[3,43,52,57,64,105,124,155],"era":[4],"of":[5,22,54,108,126],"chip":[6,61],"multi-processors":[7],"(CMP),":[8],"are":[10,84],"faced":[11],"with":[12,123,188],"two":[13,73,143],"major":[14],"architectural":[15],"challenges:":[16],"(i)":[17],"QoS":[18,96,179],"or":[19,138],"performance":[20,125],"management":[21,38,89,194],"disparate":[23],"applications":[24,158],"running":[25,114,159],"on":[26],"CPU":[27],"cores":[28,55],"contending":[29],"for":[30,71,152],"shared":[31],"cache/memory":[32,95,178],"resources":[33,58],"and":[34,118,149,164,183],"(ii)":[35],"global/local":[36],"power":[37,88],"techniques":[39,82],"to":[40,86,93,102,132,177],"stay":[41],"within":[42],"overall":[44],"platform":[45,133,163],"constraints.":[46],"The":[47,98],"problem":[48],"is":[49,101,113,121,173],"exacerbated":[50],"as":[51],"number":[53],"sharing":[56],"in":[59,160,195],"a":[60,109,115,127,161],"increase.":[62],"In":[63,75],"past,":[65],"researchers":[66],"have":[67],"proposed":[68],"independent":[69],"solutions":[70],"these":[72],"problems.":[74],"this":[76],"paper,":[77],"show":[79,169],"that":[80,83,170,184],"rate-based":[81],"employed":[85],"address":[87,94],"can":[90],"be":[91],"adapted":[92],"issues.":[97],"basic":[99],"approach":[100],"throttle":[103],"down":[104],"processing":[106],"rate":[107,144,189],"core":[110],"if":[111],"it":[112],"low-priority":[116],"task":[117,130],"its":[119],"execution":[120],"interfering":[122],"high":[128],"priority":[129],"due":[131],"resource":[134,185],"contention":[135],"(i.e.":[136],"cache":[137],"memory":[139],"contention).":[140],"We":[141,168],"evaluate":[142],"throttling":[145],"mechanisms":[146],"(clock":[147],"modulation,":[148],"frequency":[150,181],"scaling)":[151],"effectively":[153],"managing":[154],"interference":[156],"between":[157],"CMP":[162,196],"delivering":[165],"QoS/performance":[166],"management.":[167],"clock":[171],"modulation":[172],"much":[174],"more":[175],"applicable":[176],"than":[180],"scaling":[182],"monitoring":[186],"along":[187],"control":[190],"provides":[191],"effective":[192],"power-performance":[193],"platforms.":[197]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":10},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":8}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
