{"id":"https://openalex.org/W2039760015","doi":"https://doi.org/10.1145/1514932.1514935","title":"Early analysis for power distribution networks","display_name":"Early analysis for power distribution networks","publication_year":2009,"publication_date":"2009-03-29","ids":{"openalex":"https://openalex.org/W2039760015","doi":"https://doi.org/10.1145/1514932.1514935","mag":"2039760015"},"language":"en","primary_location":{"id":"doi:10.1145/1514932.1514935","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1514932.1514935","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 international symposium on Physical design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100437036","display_name":"Kai Wang","orcid":"https://orcid.org/0000-0002-6170-4744"},"institutions":[{"id":"https://openalex.org/I144536108","display_name":"Apache (Canada)","ror":"https://ror.org/052vnbj45","country_code":"CA","type":"company","lineage":["https://openalex.org/I144536108"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Kai Wang","raw_affiliation_strings":["Apache Desigon Solutions Inc., San Jose, CA, USA","Apache Desigon Solutions Inc., San Jose, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Apache Desigon Solutions Inc., San Jose, CA, USA","institution_ids":[]},{"raw_affiliation_string":"Apache Desigon Solutions Inc., San Jose, CA, USA#TAB#","institution_ids":["https://openalex.org/I144536108"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084598514","display_name":"Aveek Sarkar","orcid":"https://orcid.org/0000-0002-4781-5798"},"institutions":[{"id":"https://openalex.org/I144536108","display_name":"Apache (Canada)","ror":"https://ror.org/052vnbj45","country_code":"CA","type":"company","lineage":["https://openalex.org/I144536108"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Aveek Sarkar","raw_affiliation_strings":["Apache Design Solutions Inc., San Jose, CA, USA","[Apache Design Solutions, Inc., San Jose, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Apache Design Solutions Inc., San Jose, CA, USA","institution_ids":[]},{"raw_affiliation_string":"[Apache Design Solutions, Inc., San Jose, CA, USA]","institution_ids":["https://openalex.org/I144536108"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070536710","display_name":"Norman Chang","orcid":"https://orcid.org/0000-0003-2524-0935"},"institutions":[{"id":"https://openalex.org/I144536108","display_name":"Apache (Canada)","ror":"https://ror.org/052vnbj45","country_code":"CA","type":"company","lineage":["https://openalex.org/I144536108"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Norman Chang","raw_affiliation_strings":["Apache Design Solutions Inc., San Jose, CA, USA","[Apache Design Solutions, Inc., San Jose, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Apache Design Solutions Inc., San Jose, CA, USA","institution_ids":[]},{"raw_affiliation_string":"[Apache Design Solutions, Inc., San Jose, CA, USA]","institution_ids":["https://openalex.org/I144536108"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002596563","display_name":"Lin Shen","orcid":"https://orcid.org/0000-0001-6878-8963"},"institutions":[{"id":"https://openalex.org/I144536108","display_name":"Apache (Canada)","ror":"https://ror.org/052vnbj45","country_code":"CA","type":"company","lineage":["https://openalex.org/I144536108"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Shen Lin","raw_affiliation_strings":["Apache Design Solutions Inc., San Jose, CA, USA","[Apache Design Solutions, Inc., San Jose, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Apache Design Solutions Inc., San Jose, CA, USA","institution_ids":[]},{"raw_affiliation_string":"[Apache Design Solutions, Inc., San Jose, CA, USA]","institution_ids":["https://openalex.org/I144536108"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100437036"],"corresponding_institution_ids":["https://openalex.org/I144536108"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09357398,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"3","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6329452991485596},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5575124025344849},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5424668192863464},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5366650819778442},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5011520385742188},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.4887690246105194},{"id":"https://openalex.org/keywords/power-domains","display_name":"Power domains","score":0.47852954268455505},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.47428637742996216},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.47406214475631714},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4641614556312561},{"id":"https://openalex.org/keywords/network-planning-and-design","display_name":"Network planning and design","score":0.41789448261260986},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.41204094886779785},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40585020184516907},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.35895872116088867},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2573999762535095},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2371826469898224},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1906592845916748},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12720152735710144}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6329452991485596},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5575124025344849},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5424668192863464},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5366650819778442},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5011520385742188},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.4887690246105194},{"id":"https://openalex.org/C16021271","wikidata":"https://www.wikidata.org/wiki/Q17152552","display_name":"Power domains","level":3,"score":0.47852954268455505},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.47428637742996216},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.47406214475631714},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4641614556312561},{"id":"https://openalex.org/C114563136","wikidata":"https://www.wikidata.org/wiki/Q19725982","display_name":"Network planning and design","level":2,"score":0.41789448261260986},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.41204094886779785},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40585020184516907},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.35895872116088867},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2573999762535095},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2371826469898224},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1906592845916748},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12720152735710144},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1514932.1514935","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1514932.1514935","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 international symposium on Physical design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2162273398","https://openalex.org/W3142548232","https://openalex.org/W1975900776","https://openalex.org/W1655511996","https://openalex.org/W2132453911","https://openalex.org/W2059398121","https://openalex.org/W2366617252","https://openalex.org/W1990535547","https://openalex.org/W2063172373","https://openalex.org/W2082611011"],"abstract_inverted_index":{"An":[0],"efficient":[1],"and":[2,12,16,26,43,48,51,59,63,72,107,120],"effective":[3],"power":[4,33,44,66,96,145],"distribution":[5,67,97,146],"network":[6,147],"is":[7,69,110,117],"crucial":[8],"to":[9,23,123],"the":[10,101,125,136,144,149,154],"function":[11],"performance":[13,150],"of":[14,65,85,130],"chip":[15],"package.":[17],"As":[18],"semiconductor":[19],"processing":[20],"technology":[21],"advances":[22],"90nm":[24],"node":[25],"below,":[27],"system-on-chip":[28],"(SoC)":[29],"designs":[30],"face":[31],"complex":[32],"supply":[34,53],"challenges":[35],"driven":[36],"by":[37],"changes":[38],"such":[39],"as":[40],"higher":[41],"placement":[42,106],"density,":[45],"smaller":[46],"wire":[47],"via":[49],"geometries,":[50],"lower":[52],"voltages,":[54],"in":[55,100],"sophisticated,":[56],"multi-layered":[57],"packages":[58],"boards.":[60],"The":[61,114],"design":[62,102,131,155],"verification":[64],"networks":[68,98],"becoming":[70],"more":[71,73],"difficult,":[74],"requiring":[75],"that":[76,135,143],"these":[77],"issues":[78],"be":[79],"addressed":[80],"at":[81],"an":[82],"early":[83,99],"stage":[84],"design.":[86],"In":[87],"this":[88],"talk,":[89],"we":[90],"present":[91],"a":[92],"methodology":[93,138],"for":[94],"verifying":[95],"process,":[103],"when":[104],"complete":[105],"routing":[108],"information":[109],"not":[111],"yet":[112],"available.":[113],"usage":[115],"model":[116],"extremely":[118],"flexible":[119],"allows":[121],"designers":[122,141],"run":[124],"analysis":[126],"with":[127],"different":[128],"types":[129],"abstraction.":[132],"We":[133],"demonstrate":[134],"proposed":[137],"can":[139],"help":[140],"ensure":[142],"meets":[148],"guideline":[151],"all":[152],"through":[153],"cycle.":[156]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}