{"id":"https://openalex.org/W1995998388","doi":"https://doi.org/10.1145/1514932.1514933","title":"One look into the future of CMOS chip design","display_name":"One look into the future of CMOS chip design","publication_year":2009,"publication_date":"2009-03-29","ids":{"openalex":"https://openalex.org/W1995998388","doi":"https://doi.org/10.1145/1514932.1514933","mag":"1995998388"},"language":"en","primary_location":{"id":"doi:10.1145/1514932.1514933","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1514932.1514933","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 international symposium on Physical design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110165800","display_name":"Carl J. Anderson","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Carl John Anderson","raw_affiliation_strings":["IBM, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5110165800"],"corresponding_institution_ids":["https://openalex.org/I4210156936"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07056813,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.973800003528595,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.973800003528595,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.942654013633728},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5969210863113403},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.5116918087005615},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.48391276597976685},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48063960671424866},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4557156562805176},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4133152663707733},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33364105224609375},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3332919180393219},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2575279474258423},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.04972785711288452}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.942654013633728},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5969210863113403},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5116918087005615},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.48391276597976685},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48063960671424866},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4557156562805176},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4133152663707733},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33364105224609375},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3332919180393219},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2575279474258423},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.04972785711288452},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1514932.1514933","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1514932.1514933","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2009 international symposium on Physical design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6100000143051147,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2070694218","https://openalex.org/W2532822217","https://openalex.org/W2136854845","https://openalex.org/W2038859986","https://openalex.org/W2104315811","https://openalex.org/W2142217172","https://openalex.org/W4230312832","https://openalex.org/W1982273910"],"abstract_inverted_index":{"Both":[0],"the":[1,19],"physics":[2],"and":[3,11,31],"financial":[4],"challenges":[5],"of":[6,18,22],"CMOS":[7,24,28],"scaling":[8],"to":[9],"22nm":[10],"beyond":[12],"will":[13,33],"be":[14,34],"discussed.":[15],"The":[16],"effects":[17],"possible":[20],"slowing":[21],"future":[23],"technology":[25],"generations":[26],"on":[27],"chip":[29],"design":[30],"methodology":[32],"hypothesized.":[35]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
