{"id":"https://openalex.org/W2046878787","doi":"https://doi.org/10.1145/1508128.1508184","title":"An intermediate hardware model with load/store unit for C to FPGA","display_name":"An intermediate hardware model with load/store unit for C to FPGA","publication_year":2009,"publication_date":"2009-02-22","ids":{"openalex":"https://openalex.org/W2046878787","doi":"https://doi.org/10.1145/1508128.1508184","mag":"2046878787"},"language":"en","primary_location":{"id":"doi:10.1145/1508128.1508184","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508184","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075659609","display_name":"Akira Yamawaki","orcid":"https://orcid.org/0000-0002-8723-0620"},"institutions":[{"id":"https://openalex.org/I207014233","display_name":"Kyushu Institute of Technology","ror":"https://ror.org/02278tr80","country_code":"JP","type":"education","lineage":["https://openalex.org/I207014233"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Akira Yamawaki","raw_affiliation_strings":["Kyushu Institute of Technology, 1-1 Sensui Tabata Kitakyushu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kyushu Institute of Technology, 1-1 Sensui Tabata Kitakyushu, Japan","institution_ids":["https://openalex.org/I207014233"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071214096","display_name":"Masahiko Iwane","orcid":null},"institutions":[{"id":"https://openalex.org/I207014233","display_name":"Kyushu Institute of Technology","ror":"https://ror.org/02278tr80","country_code":"JP","type":"education","lineage":["https://openalex.org/I207014233"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiko Iwane","raw_affiliation_strings":["Kyushu Institute of Technology, 1-1 Sensui Tabata Kitakyushu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kyushu Institute of Technology, 1-1 Sensui Tabata Kitakyushu, Japan","institution_ids":["https://openalex.org/I207014233"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09803179,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"279","last_page":"279"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8346711993217468},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7071071267127991},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6189075112342834},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5961955189704895},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4724472165107727},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4664463698863983},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44787344336509705},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3570990562438965},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.10298535227775574}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8346711993217468},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7071071267127991},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6189075112342834},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5961955189704895},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4724472165107727},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4664463698863983},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44787344336509705},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3570990562438965},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10298535227775574},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1508128.1508184","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508184","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2316202402","https://openalex.org/W2082487009","https://openalex.org/W2373535795","https://openalex.org/W3103262449","https://openalex.org/W3130402546"],"abstract_inverted_index":{"We":[0],"propose":[1],"the":[2,15,18,23,49,53,56,59,66,72,83,86,101,106,110,113,119,121,128,133,144,149,153,155,163,186,189,198,200],"semi-programmable":[3],"hardware":[4,9,62,79,146,164],"(SPHW)":[5],"as":[6],"an":[7,42,141],"intermediate":[8],"that":[10,100,135,178,188],"can":[11,103,124,158,202],"be":[12,125,159],"used":[13],"by":[14,97],"designers":[16],"and":[17,41,58,81,95],"high-level":[19],"synthesis":[20],"tools":[21],"converting":[22],"C":[24,156],"programs":[25,157,177],"to":[26,64,118,162],"FPGAs.":[27],"The":[28,46,61,74,88],"SPHW":[29,134,201],"consists":[30],"of":[31,143,197],"a":[32,36,77,137,205,209],"load/store":[33,50],"unit":[34,44,80],"(LSU),":[35],"reconfigurable":[37,78],"register":[38],"file":[39],"(RRF)":[40],"execution":[43,142],"(EXU).":[45],"LSU,":[47,120,199],"executing":[48],"instructions,":[51],"transfers":[52],"data":[54,84,108,129,167,191],"between":[55],"memory":[57,93,122,181],"RRF.":[60,87,111],"designed":[63],"make":[65],"computation":[67],"faster":[68],"is":[69,76,172,194],"implemented":[70],"on":[71,85,109,148],"EXU.":[73,150],"EXU":[75,102,114],"processes":[82],"LSU":[89],"flexibly":[90],"performs":[91],"complex":[92],"accesses":[94],"bufferings":[96],"programming,":[98],"so":[99],"uniformly":[104],"process":[105],"sequential":[107],"Since":[112],"runs":[115],"in":[116],"parallel":[117],"access":[123,182],"overlapped":[126],"with":[127,166,185],"processing.":[130],"In":[131],"addition,":[132],"has":[136],"synchronization":[138],"mechanism":[139],"supports":[140],"multiple":[145],"threads":[147],"By":[151],"using":[152,174],"SPHW,":[154],"easily":[160],"converted":[161],"modules":[165],"prefetching":[168,192],"mechanisms.":[169],"An":[170],"experiment":[171],"performed":[173],"some":[175],"application":[176],"show":[179],"different":[180],"patterns.":[183],"Compared":[184],"cases":[187],"custom":[190],"circuit":[193],"attached":[195],"instead":[196],"significantly":[203],"reduce":[204],"design":[206],"cost,":[207],"achieving":[208],"comparable":[210],"performance.":[211]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}