{"id":"https://openalex.org/W2102809445","doi":"https://doi.org/10.1145/1508128.1508179","title":"Data streaming and simd support for the microblaze architecture","display_name":"Data streaming and simd support for the microblaze architecture","publication_year":2009,"publication_date":"2009-02-22","ids":{"openalex":"https://openalex.org/W2102809445","doi":"https://doi.org/10.1145/1508128.1508179","mag":"2102809445"},"language":"en","primary_location":{"id":"doi:10.1145/1508128.1508179","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508179","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016577717","display_name":"Paul E. Marks","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul E. Marks","raw_affiliation_strings":["Virginia Tech, Blacksburg, VA, USA","Virginia Tech, , Blacksburg, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech, , Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109211045","display_name":"Cameron D. Patterson","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cameron D. Patterson","raw_affiliation_strings":["Virginia Tech, Blacksburg, VA, USA","Virginia Tech, , Blacksburg, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech, , Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"277","last_page":"277"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microblaze","display_name":"MicroBlaze","score":0.988036036491394},{"id":"https://openalex.org/keywords/toolchain","display_name":"Toolchain","score":0.9494830369949341},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8121280670166016},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.723088800907135},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6257325410842896},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.6184231042861938},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.60548335313797},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5869728326797485},{"id":"https://openalex.org/keywords/software-deployment","display_name":"Software deployment","score":0.5304358005523682},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.513661801815033},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.20443090796470642},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1539475917816162}],"concepts":[{"id":"https://openalex.org/C2777575374","wikidata":"https://www.wikidata.org/wiki/Q1644704","display_name":"MicroBlaze","level":3,"score":0.988036036491394},{"id":"https://openalex.org/C2777062904","wikidata":"https://www.wikidata.org/wiki/Q545406","display_name":"Toolchain","level":3,"score":0.9494830369949341},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8121280670166016},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.723088800907135},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6257325410842896},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.6184231042861938},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.60548335313797},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5869728326797485},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.5304358005523682},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.513661801815033},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.20443090796470642},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1539475917816162},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1508128.1508179","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508179","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.47999998927116394}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2039534582","https://openalex.org/W3082104242","https://openalex.org/W2376312311","https://openalex.org/W2354823813","https://openalex.org/W2142417640","https://openalex.org/W2345501572","https://openalex.org/W4246929162","https://openalex.org/W4390939268","https://openalex.org/W1975283619","https://openalex.org/W4297818299"],"abstract_inverted_index":{"The":[0],"MicroBlaze":[1,41],"architecture":[2,42],"is":[3],"a":[4],"configurable":[5,34],"\"soft":[6],"core\"":[7],"processor":[8],"by":[9],"Xilinx":[10],"intended":[11],"for":[12,140],"use":[13,26],"in":[14],"embedded":[15,19,143],"FPGA":[16],"applications.":[17,144],"Some":[18],"data":[20],"processing":[21],"algorithms":[22],"benefit":[23],"from":[24],"the":[25,40,47,50,53,58,64,75,78,87,102,107,117,127],"of":[27,67,81,101,126],"vectorized":[28],"code":[29],"and":[30,56,73,98,130],"streaming":[31],"I/O.":[32],"Thus,":[33],"extensions":[35,129],"that":[36,133],"add":[37],"these":[38],"to":[39,106,115],"are":[43,110],"developed.":[44],"We":[45,61],"discuss":[46,86],"current":[48],"architecture,":[49],"necessary":[51],"modifications,":[52],"methods":[54],"employed,":[55],"analyze":[57],"theoretical":[59],"gains.":[60],"then":[62],"study":[63],"full":[65],"synthesis":[66],"an":[68,124],"example":[69],"hardware":[70],"platform":[71],"with":[72,91,123],"without":[74],"extensions,":[76],"comparing":[77],"expected":[79],"performance":[80],"each.":[82],"Following":[83],"that,":[84],"we":[85,121],"work":[88,132],"toward":[89],"integrating":[90],"Xilinx's":[92],"development":[93],"tools,":[94],"which":[95],"allows":[96],"simple":[97],"rapid":[99],"deployment":[100],"extended":[103],"architecture.":[104],"Modifications":[105],"software":[108],"toolchain":[109],"discussed":[111],"as":[112],"they":[113],"pertain":[114],"extending":[116],"instruction":[118],"set.":[119],"Finally,":[120],"conclude":[122],"assessment":[125],"developed":[128],"future":[131],"could":[134],"make":[135],"them":[136],"even":[137],"more":[138],"useful":[139],"reconfigurable,":[141],"high-performance":[142]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}