{"id":"https://openalex.org/W2053962247","doi":"https://doi.org/10.1145/1508128.1508178","title":"Soft vector processors vs FPGA custom hardware","display_name":"Soft vector processors vs FPGA custom hardware","publication_year":2009,"publication_date":"2009-02-22","ids":{"openalex":"https://openalex.org/W2053962247","doi":"https://doi.org/10.1145/1508128.1508178","mag":"2053962247"},"language":"en","primary_location":{"id":"doi:10.1145/1508128.1508178","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508178","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009732949","display_name":"Peter Yiannacouras","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Peter Yiannacouras","raw_affiliation_strings":["University of Toronto, Toronto, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110755517","display_name":"J. Gregory Steffan","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"J. Gregory Steffan","raw_affiliation_strings":["University of Toronto, Toronto, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090184149","display_name":"Jonathan Rose","orcid":"https://orcid.org/0000-0002-3551-2175"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jonathan Rose","raw_affiliation_strings":["University of Toronto, Toronto, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"277","last_page":"277"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.8476924300193787},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8059381246566772},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7434291243553162},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5722949504852295},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5492789149284363},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.526127815246582},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4113059937953949},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40797269344329834},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1587848663330078}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.8476924300193787},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8059381246566772},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7434291243553162},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5722949504852295},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5492789149284363},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.526127815246582},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4113059937953949},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40797269344329834},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1587848663330078}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1508128.1508178","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508178","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2109699519","https://openalex.org/W2006568360","https://openalex.org/W102726818","https://openalex.org/W4233616027","https://openalex.org/W2059591361","https://openalex.org/W970262775","https://openalex.org/W4244724753","https://openalex.org/W2535673728","https://openalex.org/W1972081536","https://openalex.org/W1831618318"],"abstract_inverted_index":{"Soft":[0],"processors":[1,46],"are":[2,139],"often":[3],"used":[4],"in":[5,22,56,169],"FPGA-based":[6],"systems":[7],"because":[8],"of":[9,161,205],"their":[10],"ease-of-use,":[11],"but":[12],"for":[13,50,60,217],"a":[14,19,25,31,35,93,102],"given":[15],"computation":[16],"there":[17],"is":[18],"significant":[20,54],"gap":[21,118],"area/performance":[23,85],"between":[24,87,119],"C":[26,89,122],"code":[27],"implementation":[28],"executing":[29,74,91,100],"on":[30,92,101],"soft":[32,45,95,103,133,171,208],"processor":[33,173,210],"and":[34,58,106,123,153,183,188,201],"custom":[36,108,124,145,162,224],"FPGA":[37,68,109],"hardware":[38,125,163,225],"implementation.":[39],"Recent":[40],"research":[41],"has":[42],"demonstrated":[43],"that":[44,113,164,193],"augmented":[47],"with":[48,71],"support":[49],"vector":[51,104,134,172,209],"instructions":[52,187],"provide":[53],"improvements":[55,196],"performance":[57,117,198],"scalability":[59],"data-parallel":[61,75],"workloads.":[62],"In":[63],"this":[64],"work,":[65],"using":[66,130],"an":[67],"platform":[69],"equipped":[70],"DDR":[72],"memory":[73],"benchmarks":[76],"from":[77],"the":[78,84,114,203,206,215],"industry-standard":[79],"EEMBC":[80],"suite,":[81],"we":[82,165],"measure":[83],"gaps":[86],"(i)":[88],"programs":[90,99],"scalar":[94,120],"processor,":[96,105],"(ii)":[97],"hand-vectorized":[98],"(iii)":[107],"hardware.":[110,146],"We":[111,147,191],"demonstrate":[112],"wall":[115],"clock":[116],"executed":[121],"can":[126],"be":[127],"drastically":[128],"reduced":[129],"our":[131,170],"improved":[132],"processors,":[135],"even":[136],"though":[137],"they":[138],"still":[140],"clocked":[141],"3x":[142,200],"slower":[143],"than":[144],"identify":[148],"loop":[149],"overhead,":[150],"data":[151],"delivery,":[152],"exact":[154],"resource":[155],"usage":[156],"as":[157],"three":[158],"key":[159],"advantages":[160],"propose":[166],"to":[167,219,221],"mitigate":[168],"respectively":[174],"by":[175,199,211],"decoupling":[176],"pipelines,":[177],"tuning":[178],"cache":[179],"design,":[180],"supporting":[181],"prefetching,":[182],"automatically":[184],"eliminating":[185],"unused":[186],"datapath":[189],"width.":[190],"show":[192],"together":[194],"these":[195],"increase":[197],"reduce":[202],"area":[204],"fastest":[207],"2x,":[212],"significantly":[213],"reducing":[214],"need":[216],"designers":[218],"resort":[220],"more":[222],"challenging":[223],"implementations.":[226]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
