{"id":"https://openalex.org/W2083155383","doi":"https://doi.org/10.1145/1508128.1508175","title":"Automatic bus macro placement for partially reconfigurable FPGA designs","display_name":"Automatic bus macro placement for partially reconfigurable FPGA designs","publication_year":2009,"publication_date":"2009-02-22","ids":{"openalex":"https://openalex.org/W2083155383","doi":"https://doi.org/10.1145/1508128.1508175","mag":"2083155383"},"language":"en","primary_location":{"id":"doi:10.1145/1508128.1508175","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508175","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042380471","display_name":"Jeffrey M. Carver","orcid":null},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeffrey M. Carver","raw_affiliation_strings":["Utah State University, Logan, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Utah State University, Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040869934","display_name":"Richard Neil Pittman","orcid":null},"institutions":[{"id":"https://openalex.org/I1290206253","display_name":"Microsoft (United States)","ror":"https://ror.org/00d0nc645","country_code":"US","type":"company","lineage":["https://openalex.org/I1290206253"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Richard Neil Pittman","raw_affiliation_strings":["Microsoft Research, Redmond, WA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsoft Research, Redmond, WA, USA","institution_ids":["https://openalex.org/I1290206253"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024695101","display_name":"Alessandro Forin","orcid":"https://orcid.org/0000-0003-2902-2337"},"institutions":[{"id":"https://openalex.org/I1290206253","display_name":"Microsoft (United States)","ror":"https://ror.org/00d0nc645","country_code":"US","type":"company","lineage":["https://openalex.org/I1290206253"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alessandro Forin","raw_affiliation_strings":["Microsoft Research, Redmond, WA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsoft Research, Redmond, WA, USA","institution_ids":["https://openalex.org/I1290206253"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.4851,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.92846329,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"269","last_page":"272"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.7936320304870605},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.755495548248291},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7346121072769165},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7338701486587524},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5346623659133911},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4761005640029907},{"id":"https://openalex.org/keywords/measure","display_name":"Measure (data warehouse)","score":0.4724583625793457},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.43618714809417725},{"id":"https://openalex.org/keywords/fitness-function","display_name":"Fitness function","score":0.42768871784210205},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32966524362564087},{"id":"https://openalex.org/keywords/genetic-algorithm","display_name":"Genetic algorithm","score":0.19890090823173523},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13736477494239807},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.099884033203125}],"concepts":[{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.7936320304870605},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.755495548248291},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7346121072769165},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7338701486587524},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5346623659133911},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4761005640029907},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.4724583625793457},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.43618714809417725},{"id":"https://openalex.org/C176066374","wikidata":"https://www.wikidata.org/wiki/Q629118","display_name":"Fitness function","level":3,"score":0.42768871784210205},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32966524362564087},{"id":"https://openalex.org/C8880873","wikidata":"https://www.wikidata.org/wiki/Q187787","display_name":"Genetic algorithm","level":2,"score":0.19890090823173523},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13736477494239807},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.099884033203125},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1508128.1508175","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508175","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2054496292","https://openalex.org/W2108262918","https://openalex.org/W2120400535","https://openalex.org/W2131455863","https://openalex.org/W2136184548"],"related_works":["https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540"],"abstract_inverted_index":{"Dynamic":[0],"Partial":[1],"Reconfiguration":[2],"of":[3,45,52,94],"FPGAs":[4],"partitions":[5],"the":[6,24,43,50,55,95,106,125,136],"configurable":[7],"logic":[8],"fabric":[9],"into":[10],"static":[11,25,32],"and":[12,31,108],"reconfigurable":[13,16,30],"regions.":[14],"The":[15,29,82,92],"regions'":[17],"functionality":[18],"changes":[19],"at":[20],"run":[21],"time":[22],"while":[23],"regions":[26,33],"continue":[27],"unperturbed.":[28],"interface":[34],"via":[35],"fixed":[36],"connection":[37],"points":[38],"(\"bus":[39],"macros\").":[40],"We":[41,69,120],"introduce":[42],"notion":[44],"a":[46,64,71,99,102,140],"fitness":[47,87,118],"score":[48],"as":[49],"measure":[51],"how":[53],"well":[54],"combined":[56],"designs":[57],"meet":[58],"their":[59],"timing":[60],"constraints,":[61],"subject":[62],"to":[63,77,131],"given":[65],"bus":[66,96],"macro":[67],"placement.":[68],"present":[70],"tool":[72,83],"that":[73,111,123],"uses":[74],"design-space":[75],"exploration":[76],"obtain":[78],"automatic,":[79],"near-optimal":[80],"placements.":[81,91],"achieves":[84],"76%":[85],"better":[86],"scores":[88],"over":[89],"manual":[90],"location":[93],"macros":[97],"around":[98],"region":[100],"has":[101],"noticeable":[103],"impact":[104],"on":[105,116],"timings,":[107],"we":[109],"found":[110,122],"this":[112],"is":[113],"accurately":[114],"reflected":[115],"our":[117],"score.":[119],"also":[121],"following":[124],"accepted":[126],"best":[127],"design":[128],"practices":[129],"leads":[130],"quantifiably":[132],"sub-optimal":[133],"placements,":[134],"underscoring":[135],"need":[137],"for":[138],"such":[139],"tool.":[141]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":8}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}