{"id":"https://openalex.org/W1995750454","doi":"https://doi.org/10.1145/1508128.1508158","title":"SPR","display_name":"SPR","publication_year":2009,"publication_date":"2009-02-22","ids":{"openalex":"https://openalex.org/W1995750454","doi":"https://doi.org/10.1145/1508128.1508158","mag":"1995750454"},"language":"en","primary_location":{"id":"doi:10.1145/1508128.1508158","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508158","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031970320","display_name":"Stephen Friedman","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Stephen Friedman","raw_affiliation_strings":["University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086431764","display_name":"Allan Carroll","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Allan Carroll","raw_affiliation_strings":["University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110927536","display_name":"Brian Van Essen","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brian Van Essen","raw_affiliation_strings":["University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054470518","display_name":"Benjamin Ylvisaker","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Benjamin Ylvisaker","raw_affiliation_strings":["University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032101034","display_name":"Carl Ebeling","orcid":"https://orcid.org/0000-0001-5032-3615"},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Carl Ebeling","raw_affiliation_strings":["University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003894282","display_name":"Scott Hauck","orcid":"https://orcid.org/0000-0001-9516-0311"},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Hauck","raw_affiliation_strings":["University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5031970320"],"corresponding_institution_ids":["https://openalex.org/I201448701"],"apc_list":null,"apc_paid":null,"fwci":5.9815,"has_fulltext":false,"cited_by_count":109,"citation_normalized_percentile":{"value":0.96382613,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"191","last_page":"200"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8419700860977173},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5893789529800415},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.5833820700645447},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5727468132972717},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5665450692176819},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5169036388397217},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.486855685710907},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45469537377357483},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3541335463523865},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14125794172286987}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8419700860977173},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5893789529800415},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.5833820700645447},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5727468132972717},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5665450692176819},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5169036388397217},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.486855685710907},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45469537377357483},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3541335463523865},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14125794172286987},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1508128.1508158","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1508128.1508158","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306084","display_name":"U.S. Department of Energy","ror":"https://ror.org/01bj3aw27"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W105298322","https://openalex.org/W1502361557","https://openalex.org/W1524957862","https://openalex.org/W1887556625","https://openalex.org/W1972887087","https://openalex.org/W2024060531","https://openalex.org/W2025787141","https://openalex.org/W2048845789","https://openalex.org/W2113103327","https://openalex.org/W2119832674","https://openalex.org/W2122992089","https://openalex.org/W2123412205","https://openalex.org/W2136054166","https://openalex.org/W2139637699","https://openalex.org/W2152041294","https://openalex.org/W2161640626","https://openalex.org/W2275304190","https://openalex.org/W3143533263","https://openalex.org/W6656506093"],"related_works":["https://openalex.org/W1897551170","https://openalex.org/W4237406352","https://openalex.org/W2000139719","https://openalex.org/W2164795702","https://openalex.org/W2171145238","https://openalex.org/W1534779213","https://openalex.org/W2051693290","https://openalex.org/W2211133912","https://openalex.org/W2132836819","https://openalex.org/W2258948885"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3,78,89],"present":[4],"SPR,":[5],"a":[6,20,45,63,71,80,101,122],"new":[7,72],"architecture-adaptive":[8],"mapping":[9],"tool":[10],"for":[11,35,97],"use":[12],"with":[13,32,67,100],"Coarse-Grained":[14],"Reconfigurable":[15],"Architectures":[16],"(CGRAs).":[17],"It":[18],"combines":[19],"VLIW":[21],"style":[22,26],"scheduler":[23,57],"and":[24,28,37,106],"FPGA":[25],"placement":[27],"pipelined":[29],"routing":[30],"algorithms":[31,40],"novel":[33],"mechanisms":[34],"integrating":[36],"adapting":[38],"the":[39,53,56,60,94],"to":[41,55,58,93,115,134],"CGRAs.":[42],"We":[43],"introduce":[44,90],"latency":[46],"padding":[47],"technique":[48],"that":[49],"provides":[50],"feedback":[51],"from":[52],"placer":[54],"meet":[59],"constraints":[61],"of":[62,85,103,131],"fixed":[64],"frequency":[65],"device":[66],"configurable":[68,108],"interconnect.":[69,137],"Using":[70],"dynamic":[73],"clustering":[74],"method":[75],"during":[76],"placement,":[77],"achieved":[79],"1.3x":[81],"improvement":[82],"in":[83,121],"throughput":[84],"mapped":[86],"designs.":[87],"Finally,":[88],"an":[91,126],"enhancement":[92],"PathFinder":[95],"algorithm":[96,112],"targeting":[98],"architectures":[99],"mix":[102],"dynamically":[104],"multiplexed":[105],"statically":[107,118],"interconnects.":[109],"The":[110],"enhanced":[111],"is":[113],"able":[114],"successfully":[116],"share":[117],"configured":[119],"interconnect":[120],"time-multiplexed":[123],"way,":[124],"achieving":[125],"average":[127],"channel":[128],"width":[129],"reduction":[130],".5x":[132],"compared":[133],"non-shared":[135],"static":[136]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":15},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":10},{"year":2013,"cited_by_count":9},{"year":2012,"cited_by_count":7}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}