{"id":"https://openalex.org/W2114154523","doi":"https://doi.org/10.1145/1500518.1500622","title":"Organization of the TRAC processor-memory subsystem","display_name":"Organization of the TRAC processor-memory subsystem","publication_year":1980,"publication_date":"1980-01-01","ids":{"openalex":"https://openalex.org/W2114154523","doi":"https://doi.org/10.1145/1500518.1500622","mag":"2114154523"},"language":"en","primary_location":{"id":"doi:10.1145/1500518.1500622","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1500518.1500622","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1500518.1500622","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the May 19-22, 1980, national computer conference on - AFIPS '80","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/1500518.1500622","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082198555","display_name":"Rajan N. Kapur","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. N. Kapur","raw_affiliation_strings":["University of Texas, Austin, Texas"],"affiliations":[{"raw_affiliation_string":"University of Texas, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025848601","display_name":"U. V. Premkumar","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"U. V. Premkumar","raw_affiliation_strings":["University of Texas, Austin, Texas"],"affiliations":[{"raw_affiliation_string":"University of Texas, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016725081","display_name":"G. Jack Lipovski","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. J. Lipovski","raw_affiliation_strings":["University of Texas, Austin, Texas"],"affiliations":[{"raw_affiliation_string":"University of Texas, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5082198555"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":0.7177,"has_fulltext":true,"cited_by_count":17,"citation_normalized_percentile":{"value":0.74653979,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"623","last_page":"623"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/trac","display_name":"TRAC","score":0.9198811650276184},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7997340559959412},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5253150463104248},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48132359981536865},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4589674472808838},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2825508117675781}],"concepts":[{"id":"https://openalex.org/C2778994249","wikidata":"https://www.wikidata.org/wiki/Q2842324","display_name":"TRAC","level":2,"score":0.9198811650276184},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7997340559959412},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5253150463104248},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48132359981536865},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4589674472808838},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2825508117675781}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1500518.1500622","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1500518.1500622","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1500518.1500622","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the May 19-22, 1980, national computer conference on - AFIPS '80","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/1500518.1500622","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1500518.1500622","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1500518.1500622","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the May 19-22, 1980, national computer conference on - AFIPS '80","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2114154523.pdf","grobid_xml":"https://content.openalex.org/works/W2114154523.grobid-xml"},"referenced_works_count":7,"referenced_works":["https://openalex.org/W2012383375","https://openalex.org/W2021618862","https://openalex.org/W2057460822","https://openalex.org/W2124337121","https://openalex.org/W2159159598","https://openalex.org/W6678420333","https://openalex.org/W6683453123"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2056463447","https://openalex.org/W4398810604","https://openalex.org/W36656230","https://openalex.org/W2184465267","https://openalex.org/W172728108","https://openalex.org/W2188796211","https://openalex.org/W1978406081","https://openalex.org/W133713611"],"abstract_inverted_index":{"TRAC":[0],"integrates":[1],"a":[2,22],"sufficient":[3],"number":[4],"of":[5,13,24,33],"architecturally":[6],"unique":[7],"features":[8],"to":[9],"justify":[10],"the":[11,25,29],"development":[12],"microprogrammed":[14],"processor":[15],"and":[16,31],"memory":[17],"modules.":[18,35],"This":[19],"paper":[20],"contains":[21],"discussion":[23],"issues":[26],"considered":[27],"in":[28],"design":[30],"implementation":[32],"these":[34]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}