{"id":"https://openalex.org/W2065254007","doi":"https://doi.org/10.1145/1500412.1500431","title":"General-purpose integrated indexing circuits","display_name":"General-purpose integrated indexing circuits","publication_year":1981,"publication_date":"1981-01-01","ids":{"openalex":"https://openalex.org/W2065254007","doi":"https://doi.org/10.1145/1500412.1500431","mag":"2065254007"},"language":"en","primary_location":{"id":"doi:10.1145/1500412.1500431","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1500412.1500431","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the May 4-7, 1981, national computer conference on - AFIPS '81","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048963764","display_name":"A. C. D. de Figueiredo","orcid":null},"institutions":[{"id":"https://openalex.org/I76903346","display_name":"University of Coimbra","ror":"https://ror.org/04z8k9a98","country_code":"PT","type":"education","lineage":["https://openalex.org/I76903346"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"A. C. D. De Figueiredo","raw_affiliation_strings":["Universidade de Coimbra, Coimbra, Portugal","Universidade de Coimbra, Coimbra, Portugal#TAB#"],"affiliations":[{"raw_affiliation_string":"Universidade de Coimbra, Coimbra, Portugal","institution_ids":["https://openalex.org/I76903346"]},{"raw_affiliation_string":"Universidade de Coimbra, Coimbra, Portugal#TAB#","institution_ids":["https://openalex.org/I76903346"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5048963764"],"corresponding_institution_ids":["https://openalex.org/I76903346"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19862624,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"141"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.8603742718696594},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8027591705322266},{"id":"https://openalex.org/keywords/search-engine-indexing","display_name":"Search engine indexing","score":0.7090112566947937},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4734846353530884},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.43086469173431396},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.42769572138786316},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4256271421909332},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3579895794391632},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1325167417526245},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11377453804016113},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1071157157421112},{"id":"https://openalex.org/keywords/information-retrieval","display_name":"Information retrieval","score":0.0770711600780487}],"concepts":[{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.8603742718696594},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8027591705322266},{"id":"https://openalex.org/C75165309","wikidata":"https://www.wikidata.org/wiki/Q2258979","display_name":"Search engine indexing","level":2,"score":0.7090112566947937},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4734846353530884},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.43086469173431396},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.42769572138786316},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4256271421909332},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3579895794391632},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1325167417526245},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11377453804016113},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1071157157421112},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0770711600780487},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1500412.1500431","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1500412.1500431","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the May 4-7, 1981, national computer conference on - AFIPS '81","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1976284552","https://openalex.org/W2062371155","https://openalex.org/W2165142873","https://openalex.org/W4234484613"],"related_works":["https://openalex.org/W2556282987","https://openalex.org/W1533508804","https://openalex.org/W2050923821","https://openalex.org/W2506885233","https://openalex.org/W1970370079","https://openalex.org/W2333680585","https://openalex.org/W2098637578","https://openalex.org/W1999746819","https://openalex.org/W3215142653","https://openalex.org/W4389045579"],"abstract_inverted_index":{"For":[0],"applications":[1],"requiring":[2],"irregular":[3],"forms":[4],"of":[5,10,12,57,66,75,82],"addressing,":[6],"the":[7,38,46,58,73,76,80],"high":[8],"speed":[9],"operation":[11],"present":[13],"day":[14],"random-access":[15],"memories":[16],"and":[17,90],"large-scale-integrated":[18],"arithmetic":[19],"structures":[20],"can":[21],"hardly":[22],"lead":[23],"to":[24,72,87],"any":[25],"significant":[26],"improvements":[27],"over":[28],"conventional":[29,88],"techniques":[30],"unless":[31],"appropriate":[32],"means":[33],"are":[34],"used":[35],"for":[36,48,54,62,79],"addressing":[37,59],"operands":[39],"at":[40],"comparable":[41],"speeds.":[42],"This":[43],"paper":[44],"proposes":[45],"architecture":[47],"an":[49],"integrated":[50],"indexing":[51],"unit":[52,78],"intended":[53],"high-speed":[55],"generation":[56],"patterns":[60],"required":[61],"a":[63],"wide":[64],"range":[65],"such":[67],"applications.":[68],"Reference":[69],"is":[70],"made":[71],"usefulness":[74],"proposed":[77],"organization":[81],"fast":[83],"array":[84],"processing":[85],"attachments":[86],"minicomputers":[89],"microcomputers.":[91]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
