{"id":"https://openalex.org/W2004300760","doi":"https://doi.org/10.1145/1499402.1499527","title":"The design of self-checking multi-output combinational circuits","display_name":"The design of self-checking multi-output combinational circuits","publication_year":1977,"publication_date":"1977-01-01","ids":{"openalex":"https://openalex.org/W2004300760","doi":"https://doi.org/10.1145/1499402.1499527","mag":"2004300760"},"language":"en","primary_location":{"id":"doi:10.1145/1499402.1499527","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1499402.1499527","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1499402.1499527","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the June 13-16, 1977, national computer conference on - AFIPS '77","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/1499402.1499527","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090147875","display_name":"Dae-Cheol Ko","orcid":"https://orcid.org/0000-0002-4064-739X"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"D. C. Ko","raw_affiliation_strings":["Burroughs Corporation, Mission Viejo, California"],"affiliations":[{"raw_affiliation_string":"Burroughs Corporation, Mission Viejo, California","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111192060","display_name":"M.A. Breuer","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. A. Breuer","raw_affiliation_strings":["University of Southern California, Los Angeles, California","University of Southern California, Los Angeles, California;"],"affiliations":[{"raw_affiliation_string":"University of Southern California, Los Angeles, California","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"University of Southern California, Los Angeles, California;","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090147875"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.14089511,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"711","last_page":"711"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.835227906703949},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.639559268951416},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.551175057888031},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5307319760322571},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5219975709915161},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5020415782928467},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.4878525733947754},{"id":"https://openalex.org/keywords/parity-bit","display_name":"Parity bit","score":0.4797160029411316},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.46447575092315674},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.41843464970588684},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4170590937137604},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.34453582763671875},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.11263155937194824},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09841933846473694},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0702979564666748}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.835227906703949},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.639559268951416},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.551175057888031},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5307319760322571},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5219975709915161},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5020415782928467},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.4878525733947754},{"id":"https://openalex.org/C131521367","wikidata":"https://www.wikidata.org/wiki/Q625502","display_name":"Parity bit","level":2,"score":0.4797160029411316},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.46447575092315674},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.41843464970588684},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4170590937137604},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.34453582763671875},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.11263155937194824},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09841933846473694},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0702979564666748},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1499402.1499527","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1499402.1499527","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1499402.1499527","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the June 13-16, 1977, national computer conference on - AFIPS '77","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/1499402.1499527","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1499402.1499527","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1499402.1499527","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the June 13-16, 1977, national computer conference on - AFIPS '77","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.4399999976158142,"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16"}],"awards":[{"id":"https://openalex.org/G8876996369","display_name":null,"funder_award_id":"N00014","funder_id":"https://openalex.org/F4320337345","funder_display_name":"Office of Naval Research"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320337345","display_name":"Office of Naval Research","ror":"https://ror.org/00rk2pe57"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2004300760.pdf","grobid_xml":"https://content.openalex.org/works/W2004300760.grobid-xml"},"referenced_works_count":13,"referenced_works":["https://openalex.org/W127812686","https://openalex.org/W290503896","https://openalex.org/W607232712","https://openalex.org/W1592929868","https://openalex.org/W2052286687","https://openalex.org/W2065482951","https://openalex.org/W2148195612","https://openalex.org/W2247583754","https://openalex.org/W2543242239","https://openalex.org/W2799349239","https://openalex.org/W4251146767","https://openalex.org/W6605095531","https://openalex.org/W6681622008"],"related_works":["https://openalex.org/W2150974517","https://openalex.org/W2072840391","https://openalex.org/W818963952","https://openalex.org/W923849220","https://openalex.org/W1939541994","https://openalex.org/W2039140951","https://openalex.org/W2157277696","https://openalex.org/W2018106661","https://openalex.org/W1851795671","https://openalex.org/W2122735785"],"abstract_inverted_index":{"In":[0],"this":[1,97],"paper":[2],"we":[3],"present":[4],"a":[5,57,72,80,103],"technique,":[6,29],"called":[7,50,83],"Extended-Parity":[8],"Checking,":[9],"for":[10,16,34,110],"the":[11,25,51,65,84,91,119,128,132,144],"design":[12,106],"of":[13,37,44,60,68,93,105,121,127,143],"error-detecting":[14],"circuits":[15],"combinational":[17],"logic":[18],"networks.":[19],"Its":[20],"concept":[21],"is":[22,31,53],"derived":[23],"from":[24],"conventional":[26],"parity":[27],"checking":[28,140],"which":[30,55,89],"applicable":[32],"only":[33],"odd":[35],"number":[36,59],"errors,":[38],"yet":[39],"it":[40],"can":[41],"detect":[42],"errors":[43,70],"any":[45],"degree.":[46],"A":[47],"structural":[48],"model,":[49],"fanoutgraph,":[52],"introduced":[54],"contains":[56],"minimum":[58],"nodes":[61,130],"sufficient":[62],"to":[63],"determine":[64],"fundamental":[66],"causes":[67],"multiple":[69],"in":[71,79,131],"circuit.":[73],"Output":[74,86],"functions":[75],"are":[76,108],"then":[77],"expressed":[78],"special":[81],"form,":[82],"Fanout-Observed":[85],"Function":[87],"(FOOF),":[88],"facilitate":[90],"analysis":[92],"errors.":[94],"Based":[95],"on":[96],"information":[98],"and":[99],"certain":[100],"circuit":[101],"parameters,":[102],"set":[104],"methods":[107],"presented":[109],"producing":[111],"self-checking":[112],"circuits.":[113],"Among":[114],"them,":[115],"one":[116],"deals":[117],"with":[118],"addition":[120],"external":[122],"leads":[123],"by":[124],"augmenting":[125],"some":[126],"fanout":[129],"original":[133],"circuit,":[134],"while":[135],"others":[136],"involve":[137],"duplicating":[138],"or":[139],"independently":[141],"parts":[142],"logic.":[145]},"counts_by_year":[],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}