{"id":"https://openalex.org/W2053770410","doi":"https://doi.org/10.1145/1480083.1480093","title":"A register transfer module FFT processor for speech analysis","display_name":"A register transfer module FFT processor for speech analysis","publication_year":1972,"publication_date":"1972-01-01","ids":{"openalex":"https://openalex.org/W2053770410","doi":"https://doi.org/10.1145/1480083.1480093","mag":"2053770410"},"language":"en","primary_location":{"id":"doi:10.1145/1480083.1480093","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1480083.1480093","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the December 5-7, 1972, fall joint computer conference, part II on - AFIPS '72 (Fall, part II)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067305668","display_name":"David Casasent","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Casasent","raw_affiliation_strings":["Carnegie Mellon Univ, Pittsburgh, Pennsylvania#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon Univ, Pittsburgh, Pennsylvania#TAB#","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010100324","display_name":"Warren Sterling","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Warren Sterling","raw_affiliation_strings":["Carnegie Mellon Univ, Pittsburgh, Pennsylvania#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon Univ, Pittsburgh, Pennsylvania#TAB#","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I74973139"],"apc_list":null,"apc_paid":null,"fwci":1.1,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61904762,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"709","last_page":"709"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10860","display_name":"Speech and Audio Processing","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8403671979904175},{"id":"https://openalex.org/keywords/preprocessor","display_name":"Preprocessor","score":0.6446226239204407},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.6435003876686096},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6288573741912842},{"id":"https://openalex.org/keywords/transfer","display_name":"Transfer (computing)","score":0.4954618215560913},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.44080305099487305},{"id":"https://openalex.org/keywords/feature","display_name":"Feature (linguistics)","score":0.42356187105178833},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41878464818000793},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.37103158235549927},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34281259775161743},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.30805081129074097},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2518805265426636},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.2076449692249298},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13320183753967285}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8403671979904175},{"id":"https://openalex.org/C34736171","wikidata":"https://www.wikidata.org/wiki/Q918333","display_name":"Preprocessor","level":2,"score":0.6446226239204407},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.6435003876686096},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6288573741912842},{"id":"https://openalex.org/C2776175482","wikidata":"https://www.wikidata.org/wiki/Q1195816","display_name":"Transfer (computing)","level":2,"score":0.4954618215560913},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.44080305099487305},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.42356187105178833},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41878464818000793},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.37103158235549927},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34281259775161743},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30805081129074097},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2518805265426636},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2076449692249298},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13320183753967285},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1480083.1480093","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1480083.1480093","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the December 5-7, 1972, fall joint computer conference, part II on - AFIPS '72 (Fall, part II)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1965615245","https://openalex.org/W1994249587","https://openalex.org/W1999532887","https://openalex.org/W2019183077","https://openalex.org/W2101132289","https://openalex.org/W2101836868","https://openalex.org/W2111235403"],"related_works":["https://openalex.org/W4327521644","https://openalex.org/W2978884468","https://openalex.org/W3132558499","https://openalex.org/W2005846134","https://openalex.org/W2168413811","https://openalex.org/W2369237035","https://openalex.org/W2948041274","https://openalex.org/W4226515754","https://openalex.org/W2087878472","https://openalex.org/W2322333442"],"abstract_inverted_index":{"On-line":[0],"speech":[1,15],"analysis":[2,12,29],"systems":[3],"are":[4],"the":[5,14,31],"subject":[6],"of":[7,13,21,54],"much":[8],"intensive":[9],"research.":[10],"Spectral":[11],"pattern":[16],"is":[17,46,70,98],"an":[18,66],"integral":[19],"part":[20],"all":[22],"such":[23],"systems.":[24],"To":[25],"facilitate":[26],"this":[27,55,103],"spectral":[28],"and":[30,49,62],"associated":[32],"preprocessing":[33],"required,":[34],"a":[35,94],"special":[36],"purpose":[37],"fast":[38],"Fourier":[39],"transform":[40],"(FFT)":[41],"processor":[42,56],"to":[43,81,102],"be":[44,79],"described":[45],"being":[47],"designed":[48],"constructed.":[50],"One":[51],"unique":[52],"feature":[53],"which":[57,77],"facilitates":[58],"both":[59],"its":[60,71],"design":[61,90],"implementation":[63],"while":[64],"providing":[65],"easily":[67,99],"alterable":[68],"machine":[69,95],"construction":[72],"from":[73],"standard":[74],"logic":[75],"modules":[76,86],"will":[78],"referred":[80],"throughout":[82],"as":[83],"register":[84],"transfer":[85],"or":[87],"RTM's.":[88],"This":[89],"approach":[91],"results":[92],"in":[93],"whose":[96],"operation":[97],"understood":[100],"due":[101],"modular":[104],"construction.":[105]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
