{"id":"https://openalex.org/W2015163116","doi":"https://doi.org/10.1145/1464291.1464319","title":"Automated logic design techniques applicable to integrated circuitry technology","display_name":"Automated logic design techniques applicable to integrated circuitry technology","publication_year":1966,"publication_date":"1966-01-01","ids":{"openalex":"https://openalex.org/W2015163116","doi":"https://doi.org/10.1145/1464291.1464319","mag":"2015163116"},"language":"en","primary_location":{"id":"doi:10.1145/1464291.1464319","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1464291.1464319","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the November 7-10, 1966, fall joint computer conference on XX - AFIPS '66 (Fall)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010926471","display_name":"R. Waxman","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R. Waxman","raw_affiliation_strings":["Hopewell Junction, New York"],"affiliations":[{"raw_affiliation_string":"Hopewell Junction, New York","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037992717","display_name":"M. T. McMahon","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. T. McMahon","raw_affiliation_strings":["Hopewell Junction, New York"],"affiliations":[{"raw_affiliation_string":"Hopewell Junction, New York","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064369732","display_name":"B. J. Crawford","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"B. J. Crawford","raw_affiliation_strings":["Hopewell Junction, New York"],"affiliations":[{"raw_affiliation_string":"Hopewell Junction, New York","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051838779","display_name":"A. B. DeAndrade","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. B. DeAndrade","raw_affiliation_strings":["Hopewell Junction, New York"],"affiliations":[{"raw_affiliation_string":"Hopewell Junction, New York","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5010926471"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.9449,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.84282262,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"247","last_page":"247"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6413660049438477},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5512378215789795},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5413737893104553},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5383582711219788},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.5293945670127869},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5049348473548889},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.4788620173931122},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4721660315990448},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.46207454800605774},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45306357741355896},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.4249131977558136},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.4175565242767334},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.41458773612976074},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2996751070022583},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2473871409893036},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.24386867880821228},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17273259162902832}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6413660049438477},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5512378215789795},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5413737893104553},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5383582711219788},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.5293945670127869},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5049348473548889},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.4788620173931122},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4721660315990448},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.46207454800605774},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45306357741355896},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.4249131977558136},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.4175565242767334},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.41458773612976074},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2996751070022583},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2473871409893036},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.24386867880821228},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17273259162902832},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1464291.1464319","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1464291.1464319","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the November 7-10, 1966, fall joint computer conference on XX - AFIPS '66 (Fall)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2089388764","https://openalex.org/W2106372992","https://openalex.org/W2329391141"],"related_works":["https://openalex.org/W2789662562","https://openalex.org/W2017528947","https://openalex.org/W1553855433","https://openalex.org/W1593362825","https://openalex.org/W1529529399","https://openalex.org/W2082591327","https://openalex.org/W2171918386","https://openalex.org/W2155174752","https://openalex.org/W2102499515","https://openalex.org/W2021357106"],"abstract_inverted_index":{"Rapidly":[0],"advancing":[1],"integrated":[2,93],"circuit":[3],"technology":[4],"has":[5],"placed":[6],"many":[7],"new":[8],"and":[9,33],"often":[10],"unforeseen":[11],"demands":[12],"on":[13,51],"logic":[14,81],"packaging":[15],"techniques":[16],"and,":[17],"hence,":[18],"is":[19,36,48,57,89],"also":[20],"impacting":[21],"traditional":[22],"computer":[23],"design":[24],"concepts.":[25],"For":[26],"instance,":[27],"one":[28],"of":[29,40],"the":[30,37,45,62,67],"most":[31],"pertinent":[32],"immediate":[34],"requirements":[35],"optimum":[38,80],"utilization":[39],"input/output":[41],"(I/O)":[42],"connections":[43],"since":[44,92],"package":[46,55,71],"size":[47],"strongly":[49],"dependent":[50],"such":[52],"connections.":[53],"The":[54],"efficiency":[56],"measured":[58],"in":[59,69,74,98],"part":[60],"by":[61],"I/O":[63],"pin-to-circuit":[64],"ratio,":[65],"assuming":[66],"circuits":[68,94],"a":[70,75],"are":[72],"connected":[73],"way":[76],"to":[77,86],"provide":[78],"an":[79],"function.":[82],"Another":[83],"potential":[84],"problem":[85],"be":[87,96],"considered":[88],"power":[90],"dissipation,":[91],"may":[95],"contained":[97],"extremely":[99],"small":[100],"areas.":[101]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}