{"id":"https://openalex.org/W1977324006","doi":"https://doi.org/10.1145/1463768.1463786","title":"Application-specific networks-on-chip topology customization using network partitioning","display_name":"Application-specific networks-on-chip topology customization using network partitioning","publication_year":2008,"publication_date":"2008-11-24","ids":{"openalex":"https://openalex.org/W1977324006","doi":"https://doi.org/10.1145/1463768.1463786","mag":"1977324006"},"language":"en","primary_location":{"id":"doi:10.1145/1463768.1463786","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1463768.1463786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st international forum on Next-generation multicore/manycore technologies","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058212573","display_name":"Ahmed A. Morgan","orcid":"https://orcid.org/0000-0003-3594-5250"},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Ahmed A. Morgan","raw_affiliation_strings":["University of Victoria, BC, Canada","University of Victoria , BC, Canada"],"affiliations":[{"raw_affiliation_string":"University of Victoria, BC, Canada","institution_ids":["https://openalex.org/I212119943"]},{"raw_affiliation_string":"University of Victoria , BC, Canada","institution_ids":["https://openalex.org/I212119943"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065317596","display_name":"Haytham Elmiligi","orcid":"https://orcid.org/0000-0003-1458-3035"},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Haytham Elmiligi","raw_affiliation_strings":["University of Victoria, BC, Canada","University of Victoria , BC, Canada"],"affiliations":[{"raw_affiliation_string":"University of Victoria, BC, Canada","institution_ids":["https://openalex.org/I212119943"]},{"raw_affiliation_string":"University of Victoria , BC, Canada","institution_ids":["https://openalex.org/I212119943"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056943013","display_name":"M. Watheq El\u2010Kharashi","orcid":"https://orcid.org/0000-0002-6033-733X"},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"M. Watheq El-Kharashi","raw_affiliation_strings":["Ain Shams University, Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"Ain Shams University, Cairo, Egypt","institution_ids":["https://openalex.org/I107720978"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014237424","display_name":"Fayez Gebali","orcid":"https://orcid.org/0000-0001-5189-3409"},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Fayez Gebali","raw_affiliation_strings":["University of Victoria, BC, Canada","University of Victoria , BC, Canada"],"affiliations":[{"raw_affiliation_string":"University of Victoria, BC, Canada","institution_ids":["https://openalex.org/I212119943"]},{"raw_affiliation_string":"University of Victoria , BC, Canada","institution_ids":["https://openalex.org/I212119943"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5058212573"],"corresponding_institution_ids":["https://openalex.org/I212119943"],"apc_list":null,"apc_paid":null,"fwci":2.1997,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.88365896,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9921000003814697,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7884389162063599},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.571269154548645},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.5172308087348938},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4885784089565277},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.451386034488678},{"id":"https://openalex.org/keywords/logical-topology","display_name":"Logical topology","score":0.44828829169273376},{"id":"https://openalex.org/keywords/graph-partition","display_name":"Graph partition","score":0.44091540575027466},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4344015419483185},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.21817201375961304},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.20853006839752197},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12192976474761963}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7884389162063599},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.571269154548645},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.5172308087348938},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4885784089565277},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.451386034488678},{"id":"https://openalex.org/C117729477","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Logical topology","level":3,"score":0.44828829169273376},{"id":"https://openalex.org/C48903430","wikidata":"https://www.wikidata.org/wiki/Q491370","display_name":"Graph partition","level":3,"score":0.44091540575027466},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4344015419483185},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.21817201375961304},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.20853006839752197},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12192976474761963},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1463768.1463786","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1463768.1463786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st international forum on Next-generation multicore/manycore technologies","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1522541290","https://openalex.org/W1559789667","https://openalex.org/W1895932829","https://openalex.org/W2005272749","https://openalex.org/W2010346244","https://openalex.org/W2041074866","https://openalex.org/W2054302810","https://openalex.org/W2082817855","https://openalex.org/W2095117703","https://openalex.org/W2098156582","https://openalex.org/W2113615756","https://openalex.org/W2118961575","https://openalex.org/W2123905442","https://openalex.org/W2127391575","https://openalex.org/W2127430446","https://openalex.org/W2138004780","https://openalex.org/W2140248153","https://openalex.org/W2143916020","https://openalex.org/W2152150905","https://openalex.org/W2155754954","https://openalex.org/W2160617362","https://openalex.org/W2160847478","https://openalex.org/W2161455936","https://openalex.org/W2540845088","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W1879279916","https://openalex.org/W2232402608","https://openalex.org/W3151408574","https://openalex.org/W2188936290","https://openalex.org/W1995429570","https://openalex.org/W4385451359","https://openalex.org/W2367709134","https://openalex.org/W1977313940","https://openalex.org/W2085298677","https://openalex.org/W2208374148"],"abstract_inverted_index":{"One":[0],"of":[1,17,39,63,90,103],"the":[2,14,18,25,29,36,61,67,80,108,117],"most":[3],"challenging":[4],"problems":[5],"in":[6,21,50],"Application-Specific":[7],"Networks-on-Chip":[8],"(ASNoC)":[9],"design":[10],"is":[11,41,53,74,94,111],"to":[12,23,78,96,115,121],"customize":[13],"topological":[15],"structure":[16],"on-chip":[19],"network":[20,45],"order":[22],"meet":[24],"application":[26,68],"requirements":[27],"with":[28,76,100],"minimum":[30],"possible":[31],"cost.":[32],"In":[33],"this":[34],"paper,":[35],"area":[37,51,59,119],"cost":[38,52],"ASNoCs":[40],"reduced":[42],"by":[43,55],"using":[44],"partitioning":[46,81],"techniques.":[47,125],"The":[48],"enhancement":[49],"achieved":[54],"reducing":[56],"both":[57],"routers":[58],"and":[60],"number":[62,102],"global":[64],"links.":[65],"Given":[66],"core":[69],"graph,":[70],"Fiduccia-Mattheyses":[71],"(FM)":[72],"algorithm":[73],"adopted":[75],"modification":[77],"formulate":[79],"problem":[82],"as":[83],"an":[84],"optimization":[85],"one.":[86],"As":[87],"a":[88,112],"proof":[89],"concept,":[91],"our":[92],"technique":[93,110],"applied":[95],"three":[97],"different":[98,101],"applications":[99],"cores.":[104],"Results":[105],"show":[106],"that":[107],"proposed":[109],"promising":[113],"way":[114],"reduce":[116],"ASNoC":[118],"compared":[120],"other":[122],"topology":[123],"generation":[124]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
