{"id":"https://openalex.org/W2119674509","doi":"https://doi.org/10.1145/1391469.1391616","title":"SystemCoDesigner","display_name":"SystemCoDesigner","publication_year":2008,"publication_date":"2008-06-08","ids":{"openalex":"https://openalex.org/W2119674509","doi":"https://doi.org/10.1145/1391469.1391616","mag":"2119674509"},"language":"en","primary_location":{"id":"doi:10.1145/1391469.1391616","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1391469.1391616","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 45th annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063619304","display_name":"Christian Haubelt","orcid":"https://orcid.org/0000-0002-1568-5423"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Christian Haubelt","raw_affiliation_strings":["University of Erlangen-Nuremberg, Germany"],"affiliations":[{"raw_affiliation_string":"University of Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108472153","display_name":"Thomas Schlichter","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thomas Schlichter","raw_affiliation_strings":["University of Erlangen-Nuremberg, Germany"],"affiliations":[{"raw_affiliation_string":"University of Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013196486","display_name":"Joachim Keinert","orcid":"https://orcid.org/0000-0003-1857-3862"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Joachim Keinert","raw_affiliation_strings":["University of Erlangen-Nuremberg, Germany"],"affiliations":[{"raw_affiliation_string":"University of Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013508438","display_name":"Mike Meredith","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164920","display_name":"Forte (United States)","ror":"https://ror.org/05h0yx811","country_code":"US","type":"company","lineage":["https://openalex.org/I4210164920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mike Meredith","raw_affiliation_strings":["Forte Design Systems, San Jose","Forte Design Systems, San Jose,#TAB#"],"affiliations":[{"raw_affiliation_string":"Forte Design Systems, San Jose","institution_ids":["https://openalex.org/I4210164920"]},{"raw_affiliation_string":"Forte Design Systems, San Jose,#TAB#","institution_ids":["https://openalex.org/I4210164920"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5063619304"],"corresponding_institution_ids":["https://openalex.org/I181369854"],"apc_list":null,"apc_paid":null,"fwci":8.6652,"has_fulltext":false,"cited_by_count":70,"citation_normalized_percentile":{"value":0.97974447,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"580","last_page":"585"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9491801261901855},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.7949024438858032},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7460266351699829},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.7177388668060303},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7169797420501709},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5972429513931274},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.5777326822280884},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5400247573852539},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5253162384033203},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5001983642578125},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.47609221935272217},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.20030122995376587},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11051970720291138}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9491801261901855},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.7949024438858032},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7460266351699829},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.7177388668060303},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7169797420501709},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5972429513931274},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.5777326822280884},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5400247573852539},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5253162384033203},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5001983642578125},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.47609221935272217},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.20030122995376587},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11051970720291138},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1391469.1391616","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1391469.1391616","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 45th annual Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W11388123","https://openalex.org/W1492019883","https://openalex.org/W1557045817","https://openalex.org/W1572085513","https://openalex.org/W1584430992","https://openalex.org/W1963975008","https://openalex.org/W2031699358","https://openalex.org/W2034039853","https://openalex.org/W2043369852","https://openalex.org/W2054608565","https://openalex.org/W2095941979","https://openalex.org/W2104493335","https://openalex.org/W2108315572","https://openalex.org/W2128044538","https://openalex.org/W2140460152","https://openalex.org/W2141480229","https://openalex.org/W2148740615","https://openalex.org/W2154300023","https://openalex.org/W2159991496","https://openalex.org/W2547044811"],"related_works":["https://openalex.org/W2548514518","https://openalex.org/W2119904701","https://openalex.org/W4234221021","https://openalex.org/W2975035977","https://openalex.org/W2269990635","https://openalex.org/W1603163876","https://openalex.org/W2133642747","https://openalex.org/W2026454041","https://openalex.org/W2166219277","https://openalex.org/W4240280328"],"abstract_inverted_index":{"SystemCoDesigner":[0,12,91,113],"is":[1,72],"an":[2,109],"ESL":[3,118],"tool":[4],"developed":[5,36],"at":[6],"the":[7,42,65,83,97,115,123],"University":[8],"of":[9,22,82,103],"Erlangen-Nuremberg,":[10],"Germany.":[11],"offers":[13],"a":[14,31,47,89],"fast":[15],"design":[16,43,66,70,127],"space":[17,71],"exploration":[18],"and":[19,60,121],"rapid":[20,106],"prototyping":[21,107],"behavioral":[23,39,48],"SystemC":[24,49],"models.":[25],"Together":[26],"with":[27],"Forte":[28,58],"Design":[29],"Systems,":[30],"fully":[32],"automated":[33],"approach":[34],"was":[35],"by":[37,75],"integrating":[38],"synthesis":[40],"into":[41],"flow.":[44],"Starting":[45],"from":[46,117],"model,":[50],"hardware":[51],"accelerators":[52],"can":[53,61,100],"be":[54,62],"generated":[55],"automatically":[56,74],"using":[57,80],"Cynthesizer":[59],"added":[63],"to":[64,96,119],"space.":[67],"The":[68],"resulting":[69],"explored":[73],"optimizing":[76],"several":[77],"objectives":[78],"simultaneously":[79],"state":[81],"art":[84],"multi-objective":[85],"optimization":[86],"algorithms.":[87],"As":[88],"result,":[90],"presents":[92],"optimized":[93],"hardware/software":[94],"solutions":[95],"designer":[98],"who":[99],"select":[101],"any":[102],"them":[104],"for":[105],"on":[108],"FPGA":[110],"basis.":[111],"Thus,":[112],"bridges":[114],"gap":[116],"RTL":[120],"increases":[122],"confidence":[124],"in":[125],"early":[126],"decisions.":[128]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":7}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
