{"id":"https://openalex.org/W2120796996","doi":"https://doi.org/10.1145/1391469.1391502","title":"Reinventing EDA with manycore processors","display_name":"Reinventing EDA with manycore processors","publication_year":2008,"publication_date":"2008-06-08","ids":{"openalex":"https://openalex.org/W2120796996","doi":"https://doi.org/10.1145/1391469.1391502","mag":"2120796996"},"language":"en","primary_location":{"id":"doi:10.1145/1391469.1391502","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1391469.1391502","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 45th annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sachin Sapatnekar","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN","University of Minnesota , Minneapolis, Mn"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":"University of Minnesota , Minneapolis, Mn","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085186069","display_name":"Eshel Haritan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Eshel Haritan","raw_affiliation_strings":["CoWare, Inc., San Jose, CA"],"affiliations":[{"raw_affiliation_string":"CoWare, Inc., San Jose, CA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047285420","display_name":"Kurt Keutzer","orcid":"https://orcid.org/0000-0003-3868-8501"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kurt Keutzer","raw_affiliation_strings":["University of California, Berkeley, Berkeley, CA"],"affiliations":[{"raw_affiliation_string":"University of California, Berkeley, Berkeley, CA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109226835","display_name":"Anirudh Devgan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210126997","display_name":"Software and Engineering Associates (United States)","ror":"https://ror.org/03qt0ma29","country_code":"US","type":"company","lineage":["https://openalex.org/I4210126997"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anirudh Devgan","raw_affiliation_strings":["Magma Design Automation, Austin, TX","Magma Design Automation, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"Magma Design Automation, Austin, TX","institution_ids":[]},{"raw_affiliation_string":"Magma Design Automation, Austin, TX#TAB#","institution_ids":["https://openalex.org/I4210126997"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061222925","display_name":"Desmond A. Kirkpatrick","orcid":"https://orcid.org/0000-0002-6982-1830"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Desmond A. Kirkpatrick","raw_affiliation_strings":["Intel Corp., Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corp., Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062437278","display_name":"S.R. Meier","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Stephen Meier","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA","Synopsys, Inc. Mountain View, CA#TAB#"],"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA#TAB#","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111935077","display_name":"Duaine Pryor","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]},{"id":"https://openalex.org/I105695857","display_name":"Siemens (Hungary)","ror":"https://ror.org/01rk7mv85","country_code":"HU","type":"company","lineage":["https://openalex.org/I105695857","https://openalex.org/I1325886976"]}],"countries":["HU","US"],"is_corresponding":false,"raw_author_name":"Duaine Pryor","raw_affiliation_strings":["Mentor Graphics Corp., San Jose, CA","Mentor Graphics Corporation, San Jose, CA#TAB#"],"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corp., San Jose, CA","institution_ids":["https://openalex.org/I4210156212"]},{"raw_affiliation_string":"Mentor Graphics Corporation, San Jose, CA#TAB#","institution_ids":["https://openalex.org/I105695857"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038346042","display_name":"Tom Spyrou","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tom Spyrou","raw_affiliation_strings":["Cadence Design Systems, Inc, San Jose, CA","Cadence Design Systems Inc., San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Inc, San Jose, CA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems Inc., San Jose, CA","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5068714995"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":0.9988,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.78534346,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"126","last_page":"127"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9902999997138977,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9839000105857849,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.667809784412384},{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.654796838760376},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.6452786326408386},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6030710339546204},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5991791486740112},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.570794939994812},{"id":"https://openalex.org/keywords/moores-law","display_name":"Moore's law","score":0.5522944927215576},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.46800461411476135},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4492826759815216},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.44821587204933167},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4257737994194031},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4212353527545929},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38000237941741943},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.3619116544723511},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24718475341796875},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13091757893562317},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12113922834396362}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.667809784412384},{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.654796838760376},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.6452786326408386},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6030710339546204},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5991791486740112},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.570794939994812},{"id":"https://openalex.org/C206891323","wikidata":"https://www.wikidata.org/wiki/Q178655","display_name":"Moore's law","level":2,"score":0.5522944927215576},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.46800461411476135},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4492826759815216},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.44821587204933167},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4257737994194031},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4212353527545929},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38000237941741943},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.3619116544723511},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24718475341796875},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13091757893562317},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12113922834396362}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1391469.1391502","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1391469.1391502","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 45th annual Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4253195573","https://openalex.org/W2020934033","https://openalex.org/W2051886008","https://openalex.org/W2535520145","https://openalex.org/W1716153929","https://openalex.org/W2743305891","https://openalex.org/W3011978806","https://openalex.org/W4247760676","https://openalex.org/W3205162826","https://openalex.org/W2610167993"],"abstract_inverted_index":{"Faced":[0],"with":[1,4],"continually":[2],"coping":[3],"Moore's":[5],"Law,":[6],"computer-aided":[7],"design":[8,21,37,51,58,81,110],"(CAD)":[9],"for":[10,59,93],"integrated":[11],"circuits":[12],"is":[13,26],"used":[14],"to":[15,33,104,139,143],"facing":[16],"challenges":[17],"in":[18,36,57,90,97],"our":[19,80,98,113],"ever-evolving":[20],"problem.":[22],"Increasing":[23],"device":[24],"complexity":[25],"a":[27,72,121],"perennial":[28],"challenge":[29,133],"and":[30,53,66,111],"has":[31],"led":[32],"several":[34],"discontinuities":[35],"methodology.":[38],"Over":[39],"the":[40,50,62,94,107,127,144],"last":[41],"decade":[42],"deep":[43],"submicron":[44],"physical":[45],"effects":[46],"have":[47],"significantly":[48],"complicated":[49],"process":[52],"required":[54],"new":[55,73],"efforts":[56],"manufacturability.":[60],"With":[61],"emergence":[63],"of":[64,75,124,130],"multicore":[65],"manycore":[67],"microprocessor":[68,84],"systems":[69,85],"we":[70,101,109],"face":[71],"type":[74],"challenge:":[76],"Not":[77],"only":[78],"will":[79,102,134],"object":[82],"(the":[83],"themselves)":[86],"take":[87],"another":[88],"leap":[89],"complexity,":[91],"but":[92],"first":[95],"time":[96],"industry's":[99],"history":[100],"need":[103],"fundamentally":[105],"change":[106],"way":[108],"implement":[112],"software":[114],"solutions":[115],"as":[116],"well.":[117],"In":[118],"this":[119,132],"panel":[120],"broad":[122],"set":[123],"representatives":[125],"at":[126],"front":[128],"lines":[129],"addressing":[131],"outline":[135],"how":[136],"they":[137],"plan":[138],"respond.":[140],"Representative":[141],"questions":[142],"panelists":[145],"include:":[146]},"counts_by_year":[{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
