{"id":"https://openalex.org/W2161223326","doi":"https://doi.org/10.1145/1366110.1366215","title":"12bits 40mhz pipelined ADC with duty-correction circuit","display_name":"12bits 40mhz pipelined ADC with duty-correction circuit","publication_year":2008,"publication_date":"2008-05-04","ids":{"openalex":"https://openalex.org/W2161223326","doi":"https://doi.org/10.1145/1366110.1366215","mag":"2161223326"},"language":"en","primary_location":{"id":"doi:10.1145/1366110.1366215","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1366110.1366215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 18th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5104265028","display_name":"Jaeyong Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I191879574","display_name":"Inha University","ror":"https://ror.org/01easw929","country_code":"KR","type":"education","lineage":["https://openalex.org/I191879574"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Jaeyong Lee","raw_affiliation_strings":["Inha University, Incheon, South Korea"],"affiliations":[{"raw_affiliation_string":"Inha University, Incheon, South Korea","institution_ids":["https://openalex.org/I191879574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001372385","display_name":"Sung\u2010Il Cho","orcid":"https://orcid.org/0000-0003-4085-1494"},"institutions":[{"id":"https://openalex.org/I191879574","display_name":"Inha University","ror":"https://ror.org/01easw929","country_code":"KR","type":"education","lineage":["https://openalex.org/I191879574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungil Cho","raw_affiliation_strings":["Inha University, Incheon, South Korea"],"affiliations":[{"raw_affiliation_string":"Inha University, Incheon, South Korea","institution_ids":["https://openalex.org/I191879574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110364479","display_name":"Kwang-Sub Yoon","orcid":null},"institutions":[{"id":"https://openalex.org/I191879574","display_name":"Inha University","ror":"https://ror.org/01easw929","country_code":"KR","type":"education","lineage":["https://openalex.org/I191879574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kwangsub Yoon","raw_affiliation_strings":["Inha University, Incheon, South Korea"],"affiliations":[{"raw_affiliation_string":"Inha University, Incheon, South Korea","institution_ids":["https://openalex.org/I191879574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5104265028"],"corresponding_institution_ids":["https://openalex.org/I191879574"],"apc_list":null,"apc_paid":null,"fwci":0.2422,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.63505868,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"22","issue":null,"first_page":"441","last_page":"444"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.7887588143348694},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.6928581595420837},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6828988790512085},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.595518946647644},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5479595065116882},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5183618664741516},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.5102121829986572},{"id":"https://openalex.org/keywords/miniaturization","display_name":"Miniaturization","score":0.4951716959476471},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.4699661433696747},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.41540154814720154},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29934096336364746},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21975746750831604}],"concepts":[{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.7887588143348694},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.6928581595420837},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6828988790512085},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.595518946647644},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5479595065116882},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5183618664741516},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.5102121829986572},{"id":"https://openalex.org/C57528182","wikidata":"https://www.wikidata.org/wiki/Q1271842","display_name":"Miniaturization","level":2,"score":0.4951716959476471},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.4699661433696747},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41540154814720154},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29934096336364746},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21975746750831604},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1366110.1366215","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1366110.1366215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 18th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1973972245","https://openalex.org/W2015929859","https://openalex.org/W2018918953","https://openalex.org/W2109980650","https://openalex.org/W2114478979","https://openalex.org/W2114953806","https://openalex.org/W2118721819","https://openalex.org/W2139736867"],"related_works":["https://openalex.org/W2904640696","https://openalex.org/W2752640128","https://openalex.org/W2278942241","https://openalex.org/W2997894768","https://openalex.org/W2568520569","https://openalex.org/W2345299457","https://openalex.org/W2418527074","https://openalex.org/W2533361262","https://openalex.org/W4206356469","https://openalex.org/W2368405386"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"an":[3],"I/Q":[4],"channel":[5],"12bits":[6],"40MS/s":[7],"Pipeline":[8],"Analog":[9],"to":[10,16,18,55,64],"Digital":[11],"Converter":[12],"that":[13],"is":[14,21,50,72,96,104],"able":[15],"apply":[17],"WLAN/WMAN":[19],"system":[20],"proposed.":[22],"The":[23,69,89],"proposed":[24,93],"ADC":[25,71,95],"integrates":[26],"DLL":[27],"based":[28],"duty-correction":[29],"circuit":[30],"which":[31],"corrects":[32],"the":[33,36,92],"fluctuations":[34],"in":[35,74],"duty":[37,59,67],"cycle":[38,60],"caused":[39],"by":[40],"miniaturization":[41],"of":[42,91,100],"CMOS":[43,77],"devices":[44],"and":[45,82,98],"faster":[46],"operating":[47],"speeds.":[48],"It":[49],"designed":[51],"as":[52],"a":[53,75],"1%":[54],"99%":[56],"input":[57],"clock":[58],"could":[61],"be":[62],"corrected":[63],"50%":[65],"output":[66],"cycle.":[68],"prototype":[70],"implemented":[73],"0.18\u00b5m":[76],"n-well":[78],"1-poly":[79],"6-metal":[80],"process":[81],"dissipates":[83],"184mW":[84],"at":[85],"1.8V":[86],"single":[87],"supply.":[88],"SNDR":[90],"12bit":[94],"52dB":[97],"SFDR":[99],"59dBc":[101],"(@Fs=20MHz,":[102],"Fin=1MHz)":[103],"measured.":[105]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}