{"id":"https://openalex.org/W2049546399","doi":"https://doi.org/10.1145/1353629.1353648","title":"Fast interconnect synthesis with layer assignment","display_name":"Fast interconnect synthesis with layer assignment","publication_year":2008,"publication_date":"2008-04-13","ids":{"openalex":"https://openalex.org/W2049546399","doi":"https://doi.org/10.1145/1353629.1353648","mag":"2049546399"},"language":"en","primary_location":{"id":"doi:10.1145/1353629.1353648","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1353629.1353648","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2008 international symposium on Physical design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100448036","display_name":"Zhuo Li","orcid":"https://orcid.org/0000-0002-9937-2669"},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Zhuo Li","raw_affiliation_strings":["IBM Research, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"IBM Research, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113656006","display_name":"Charles J. Alpert","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Charles J. Alpert","raw_affiliation_strings":["IBM Research, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"IBM Research, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114375267","display_name":"Shiyan Hu","orcid":"https://orcid.org/0000-0001-5029-1588"},"institutions":[{"id":"https://openalex.org/I11957088","display_name":"Michigan Technological University","ror":"https://ror.org/0036rpn28","country_code":"US","type":"education","lineage":["https://openalex.org/I11957088"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shiyan Hu","raw_affiliation_strings":["Michigan Technological University, Houghton, MI, USA","Michigan Technological University Houghton, MI, USA,#TAB#"],"affiliations":[{"raw_affiliation_string":"Michigan Technological University, Houghton, MI, USA","institution_ids":["https://openalex.org/I11957088"]},{"raw_affiliation_string":"Michigan Technological University Houghton, MI, USA,#TAB#","institution_ids":["https://openalex.org/I11957088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056746909","display_name":"Tuhin Muhmud","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tuhin Muhmud","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA","[IBM Systems and Technology Group, Austin, TX, USA]"],"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]},{"raw_affiliation_string":"[IBM Systems and Technology Group, Austin, TX, USA]","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111935720","display_name":"Stephen T. Quay","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen T. Quay","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA","[IBM Systems and Technology Group, Austin, TX, USA]"],"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]},{"raw_affiliation_string":"[IBM Systems and Technology Group, Austin, TX, USA]","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036979863","display_name":"Paul G. Villarrubia","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul G. Villarrubia","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA","[IBM Systems and Technology Group, Austin, TX, USA]"],"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]},{"raw_affiliation_string":"[IBM Systems and Technology Group, Austin, TX, USA]","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5100448036"],"corresponding_institution_ids":["https://openalex.org/I4210156936"],"apc_list":null,"apc_paid":null,"fwci":4.4076,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.94209228,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"71","last_page":"77"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.8611211180686951},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.8518116474151611},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.5414294600486755},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5406027436256409},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5301540493965149},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5011510848999023},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.47425949573516846},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4357859194278717},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4328470528125763},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43221038579940796},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4114048182964325},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.32615742087364197},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28516021370887756},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2631159722805023},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.2545969486236572},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25434762239456177},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15041899681091309},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11500707268714905}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.8611211180686951},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.8518116474151611},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5414294600486755},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5406027436256409},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5301540493965149},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5011510848999023},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.47425949573516846},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4357859194278717},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4328470528125763},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43221038579940796},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4114048182964325},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.32615742087364197},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28516021370887756},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2631159722805023},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2545969486236572},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25434762239456177},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15041899681091309},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11500707268714905},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1353629.1353648","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1353629.1353648","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2008 international symposium on Physical design","raw_type":"proceedings-article"},{"id":"pmh:oai:digitalcommons.mtu.edu:michigantech-p-31789","is_oa":false,"landing_page_url":"https://digitalcommons.mtu.edu/michigantech-p/12487","pdf_url":null,"source":{"id":"https://openalex.org/S4377196391","display_name":"Digital Commons - Michigan Tech (Michigan Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I11957088","host_organization_name":"Michigan Technological University","host_organization_lineage":["https://openalex.org/I11957088"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Michigan Tech Publications, Part 1","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.377.2134","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.377.2134","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.mtu.edu/faculty/shiyan/LiISPD08.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1967474595","https://openalex.org/W1968636796","https://openalex.org/W1976809982","https://openalex.org/W1999938868","https://openalex.org/W2004809424","https://openalex.org/W2012173826","https://openalex.org/W2069162780","https://openalex.org/W2087275089","https://openalex.org/W2096773724","https://openalex.org/W2110697119","https://openalex.org/W2113537658","https://openalex.org/W2123316553","https://openalex.org/W2127434816","https://openalex.org/W2137428232","https://openalex.org/W2141907973","https://openalex.org/W2145091135","https://openalex.org/W2160252016"],"related_works":["https://openalex.org/W2181385951","https://openalex.org/W1727049600","https://openalex.org/W4321510758","https://openalex.org/W4389672975","https://openalex.org/W2121036163","https://openalex.org/W2781601456","https://openalex.org/W2138401961","https://openalex.org/W1965232212","https://openalex.org/W2170433636","https://openalex.org/W2064066670"],"abstract_inverted_index":{"As":[0],"technology":[1],"scaling":[2],"advances":[3],"beyond":[4],"65":[5],"nanometer":[6],"node,":[7],"more":[8],"devices":[9],"can":[10],"fit":[11],"onto":[12],"a":[13,57],"chip,":[14],"which":[15],"implies":[16],"continued":[17],"growth":[18],"of":[19,56],"design":[20,33],"size.":[21],"The":[22],"increased":[23],"wire":[24,30,47],"delay":[25],"dominance":[26],"due":[27],"to":[28,51],"finer":[29],"widths":[31],"makes":[32],"closure":[34,60],"an":[35],"increasingly":[36],"challenging":[37],"problem.":[38],"Interconnect":[39],"synthesis":[40],"techniques,":[41],"such":[42],"as":[43],"buffer":[44],"insertion/sizing":[45],"and":[46],"sizing,":[48],"have":[49],"proven":[50],"be":[52],"the":[53],"critical":[54],"part":[55],"successful":[58],"timing":[59],"optimization":[61],"tool.":[62]},"counts_by_year":[{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
