{"id":"https://openalex.org/W2018593616","doi":"https://doi.org/10.1145/1331897.1331901","title":"A Desktop Computer with a Reconfigurable Pentium\u00ae","display_name":"A Desktop Computer with a Reconfigurable Pentium\u00ae","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W2018593616","doi":"https://doi.org/10.1145/1331897.1331901","mag":"2018593616"},"language":"en","primary_location":{"id":"doi:10.1145/1331897.1331901","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1331897.1331901","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113526607","display_name":"Shih\u2010Lien L. Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Shih-Lien L. Lu","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009732949","display_name":"Peter Yiannacouras","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Yiannacouras","raw_affiliation_strings":["Universty of Toronto (intern at Intel Corp.)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universty of Toronto (intern at Intel Corp.)","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018071173","display_name":"Taeweon Suh","orcid":"https://orcid.org/0000-0002-6377-5482"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Taeweon Suh","raw_affiliation_strings":["Georgia Institute of Technology (intern at Intel Corp.)","Georgia Institute of Technology (intern at Intel Corp.)#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology (intern at Intel Corp.)","institution_ids":["https://openalex.org/I130701444","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Georgia Institute of Technology (intern at Intel Corp.)#TAB#","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031803130","display_name":"Rolf Kassa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Rolf Kassa","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028291857","display_name":"Michael Konow","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Michael Konow","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5113526607"],"corresponding_institution_ids":["https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":1.0356,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.79844317,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"1","issue":"1","first_page":"1","last_page":"15"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pentium","display_name":"Pentium","score":0.9303098917007446},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8337875604629517},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.666751503944397},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6261415481567383},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5943038463592529},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5885432362556458},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5723488330841064},{"id":"https://openalex.org/keywords/motherboard","display_name":"Motherboard","score":0.5456098914146423},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.5404061079025269},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.4665375053882599},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.44728347659111023},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43184390664100647},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38487762212753296}],"concepts":[{"id":"https://openalex.org/C46268123","wikidata":"https://www.wikidata.org/wiki/Q214314","display_name":"Pentium","level":2,"score":0.9303098917007446},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8337875604629517},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.666751503944397},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6261415481567383},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5943038463592529},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5885432362556458},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5723488330841064},{"id":"https://openalex.org/C2777697265","wikidata":"https://www.wikidata.org/wiki/Q4321","display_name":"Motherboard","level":2,"score":0.5456098914146423},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.5404061079025269},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.4665375053882599},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.44728347659111023},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43184390664100647},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38487762212753296}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1331897.1331901","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1331897.1331901","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W64953808","https://openalex.org/W130568994","https://openalex.org/W155083144","https://openalex.org/W1569032152","https://openalex.org/W1995348478","https://openalex.org/W2022807575","https://openalex.org/W2100313538","https://openalex.org/W2120635877","https://openalex.org/W2124975889","https://openalex.org/W2133712953","https://openalex.org/W2141342364","https://openalex.org/W2148949838","https://openalex.org/W2161614117","https://openalex.org/W2293995198"],"related_works":["https://openalex.org/W2993409390","https://openalex.org/W2390709857","https://openalex.org/W2739296333","https://openalex.org/W595215389","https://openalex.org/W1660591284","https://openalex.org/W2127365353","https://openalex.org/W612850783","https://openalex.org/W909721618","https://openalex.org/W2058520863","https://openalex.org/W1506146647"],"abstract_inverted_index":{"Advancements":[0],"in":[1,35,67,109,117,198],"reconfigurable":[2,11],"technologies,":[3],"specifically":[4],"FPGAs,":[5],"have":[6,104,121],"yielded":[7],"faster,":[8],"more":[9],"power-efficient":[10],"devices":[12],"with":[13,77,86,186],"enormous":[14],"capacities.":[15],"In":[16,40,182],"our":[17],"work,":[18],"we":[19,42,73,103,184],"provide":[20],"testament":[21],"to":[22,125,148,166],"the":[23,56,112,118,123,131,149,156,173,178],"impressive":[24],"capacity":[25],"of":[26,111,130],"recent":[27],"FPGAs":[28,45],"by":[29],"hosting":[30],"a":[31,36,106,127,199],"complete":[32,128,157],"Pentium":[33,132],"\u00ae":[34,133],"single":[37],"FPGA":[38],"chip.":[39],"addition":[41],"demonstrate":[43],"how":[44],"can":[46,143],"be":[47],"used":[48,122],"for":[49],"microprocessor":[50,134],"design":[51],"space":[52],"exploration":[53],"while":[54],"overcoming":[55],"tension":[57],"between":[58],"simulation":[59],"speed,":[60],"model":[61,64],"accuracy,":[62],"and":[63,99,120,151,177,193],"completeness":[65],"found":[66],"traditional":[68],"software":[69],"simulator":[70],"environments.":[71],"Specifically,":[72],"perform":[74],"preliminary":[75,168],"experimentation/prototyping":[76],"an":[78],"original":[79],"Socket":[80],"7":[81],"based":[82],"desktop":[83,158],"processor":[84,113,150],"system":[85,165],"typical":[87],"hardware":[88,188],"peripherals":[89],"running":[90],"modern":[91],"operating":[92],"systems":[93],"such":[94,190],"as":[95,191],"Fedora":[96],"Core":[97],"4":[98],"Windows":[100],"XP;":[101],"however":[102],"inserted":[105],"Xilinx":[107],"Virtex-4":[108,124],"place":[110],"that":[114],"should":[115],"sit":[116],"motherboard":[119],"host":[126],"version":[129],"(which":[135],"consumes":[136],"less":[137],"than":[138],"half":[139],"its":[140],"resources).":[141],"We":[142,160],"therefore":[144],"apply":[145],"architectural":[146,169],"changes":[147],"evaluate":[152],"their":[153],"effects":[154],"on":[155],"system.":[159],"use":[161],"this":[162],"FPGA-based":[163],"emulation":[164],"conduct":[167],"experiments":[170],"including":[171],"growing":[172],"branch":[174],"target":[175],"buffer":[176],"level":[179],"1":[180],"caches.":[181],"addition,":[183],"experimented":[185],"interfacing":[187],"accelerators":[189],"DES":[192],"AES":[194],"engines":[195],"which":[196],"resulted":[197],"27x":[200],"speedup.":[201]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
