{"id":"https://openalex.org/W2062334041","doi":"https://doi.org/10.1145/1327171.1327185","title":"A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs","display_name":"A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs","publication_year":2007,"publication_date":"2007-09-16","ids":{"openalex":"https://openalex.org/W2062334041","doi":"https://doi.org/10.1145/1327171.1327185","mag":"2062334041"},"language":"en","primary_location":{"id":"doi:10.1145/1327171.1327185","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1327171.1327185","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025482028","display_name":"Isao Kotera","orcid":null},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Isao Kotera","raw_affiliation_strings":["Tohoku University, Sendai, Japan","Tohoku University Sendai, Japan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Tohoku University Sendai, Japan#TAB#","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033954091","display_name":"Ryusuke Egawa","orcid":"https://orcid.org/0000-0001-8966-867X"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ryusuke Egawa","raw_affiliation_strings":["Tohoku University, Sendai, Japan","Tohoku University Sendai, Japan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Tohoku University Sendai, Japan#TAB#","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011172934","display_name":"Hiroyuki Takizawa","orcid":"https://orcid.org/0000-0003-2858-3140"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Takizawa","raw_affiliation_strings":["Tohoku University, Sendai, Japan","Tohoku University Sendai, Japan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Tohoku University Sendai, Japan#TAB#","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007893254","display_name":"Hiroaki Kobayashi","orcid":"https://orcid.org/0000-0002-3350-1413"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroaki Kobayashi","raw_affiliation_strings":["Tohoku University, Sendai, Japan","Tohoku University Sendai, Japan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Tohoku University Sendai, Japan#TAB#","institution_ids":["https://openalex.org/I201537933"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I201537933"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"31","issue":null,"first_page":"113","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8445490598678589},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.834304928779602},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.7410279512405396},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.6696515679359436},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.6505957841873169},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5997816324234009},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.5975755453109741},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.5942463874816895},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.5849136114120483},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5515550971031189},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.424422949552536},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.41852816939353943},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.41217589378356934},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.06737521290779114}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8445490598678589},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.834304928779602},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.7410279512405396},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.6696515679359436},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.6505957841873169},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5997816324234009},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.5975755453109741},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.5942463874816895},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.5849136114120483},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5515550971031189},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.424422949552536},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.41852816939353943},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.41217589378356934},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06737521290779114},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1327171.1327185","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1327171.1327185","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1967474856","https://openalex.org/W1971851724","https://openalex.org/W1974505834","https://openalex.org/W2004748550","https://openalex.org/W2044206819","https://openalex.org/W2101308451","https://openalex.org/W2110134128","https://openalex.org/W2110999128","https://openalex.org/W2129192659","https://openalex.org/W2129816520","https://openalex.org/W2131054871","https://openalex.org/W2131507936","https://openalex.org/W2143773524","https://openalex.org/W2150073849","https://openalex.org/W2155396321","https://openalex.org/W4230428899"],"related_works":["https://openalex.org/W2133489088","https://openalex.org/W2363769136","https://openalex.org/W2114386333","https://openalex.org/W2126408955","https://openalex.org/W2734782074","https://openalex.org/W2539712666","https://openalex.org/W2148571123","https://openalex.org/W2396934146","https://openalex.org/W2369103246","https://openalex.org/W2118932116"],"abstract_inverted_index":{"Chip":[0],"Multiprocessor":[1],"(CMP)":[2],"architectures":[3],"are":[4],"the":[5,59,83,89,117,120],"principal":[6],"trend":[7],"in":[8,70],"current":[9],"and":[10,14,26,46,54,74,119],"future":[11],"microprocessor":[12],"design,":[13],"on-chip":[15],"shared":[16,37],"cache":[17,38,47,52,63,102,121],"mechanisms":[18],"play":[19],"a":[20,35,66,93,97,105,133],"key":[21],"role":[22],"to":[23,96],"realize":[24],"low-power":[25],"high":[27,44],"performance":[28,45,60,73,78,134],"CMPs.":[29],"In":[30],"this":[31],"paper,":[32],"we":[33],"propose":[34],"way-allocatable":[36],"mechanism,":[39],"which":[40],"can":[41,86,109,127],"achieve":[42],"both":[43],"power":[48,55],"reduction":[49],"by":[50,65,113],"using":[51],"partitioning":[53],"gating.":[56],"We":[57],"evaluate":[58],"of":[61,72,136],"our":[62],"mechanism":[64,85,103],"cycle":[67],"accurate":[68],"simulator,":[69],"terms":[71],"energy":[75,111,130],"consumption.":[76],"The":[77,100],"evaluation":[79],"results":[80],"show":[81],"that":[82],"proposed":[84,101],"properly":[87],"adjust":[88],"control":[90],"policy":[91],"from":[92],"performance-oriented":[94,106],"configuration":[95],"energy-oriented":[98,124],"one.":[99],"with":[104,122,132],"parameter":[107,125],"setting":[108,126],"reduce":[110,128],"consumption":[112,131],"20%":[114],"while":[115],"keeping":[116],"performance,":[118],"an":[123],"54%":[129],"degradation":[135],"13%.":[137]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}