{"id":"https://openalex.org/W2006191444","doi":"https://doi.org/10.1145/1289816.1289869","title":"Bridging gap between simulation and spreadsheet study","display_name":"Bridging gap between simulation and spreadsheet study","publication_year":2007,"publication_date":"2007-09-30","ids":{"openalex":"https://openalex.org/W2006191444","doi":"https://doi.org/10.1145/1289816.1289869","mag":"2006191444"},"language":"en","primary_location":{"id":"doi:10.1145/1289816.1289869","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1289816.1289869","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056624790","display_name":"Antoine Perrin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Antoine Perrin","raw_affiliation_strings":["STMicroelectronics, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Grenoble, France","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024171986","display_name":"Frank Ghenassia","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Frank Ghenassia","raw_affiliation_strings":["STMicroelectronics, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Grenoble, France","institution_ids":["https://openalex.org/I4210104693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5056624790"],"corresponding_institution_ids":["https://openalex.org/I4210104693"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07482538,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"215","last_page":"216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9616534113883972},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.8646011352539062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7799487113952637},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5256351828575134},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5202785134315491},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5042253732681274},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5009782314300537},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4756952226161957},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4709179103374481},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.43162959814071655},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.35885781049728394},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20027786493301392},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.13388153910636902}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9616534113883972},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.8646011352539062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7799487113952637},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5256351828575134},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5202785134315491},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5042253732681274},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5009782314300537},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4756952226161957},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4709179103374481},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.43162959814071655},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.35885781049728394},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20027786493301392},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13388153910636902},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1289816.1289869","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1289816.1289869","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.380.8581","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.380.8581","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/esweek07/codes/p215.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1550409889","https://openalex.org/W1830510111","https://openalex.org/W2039065447","https://openalex.org/W2208074837","https://openalex.org/W1581055755","https://openalex.org/W2102117846","https://openalex.org/W2132074508","https://openalex.org/W4256613086","https://openalex.org/W2149449165","https://openalex.org/W2547475129"],"abstract_inverted_index":{"System":[0],"architects":[1,93],"working":[2],"on":[3,29,62],"SoC":[4],"design":[5,55],"have":[6],"traditionally":[7],"been":[8,51],"hampered":[9],"by":[10],"the":[11,67,74,81],"lack":[12],"of":[13,22,69,76],"a":[14,30,77],"cohesive":[15],"methodology":[16],"for":[17,103],"architecture":[18],"evaluation":[19],"and":[20,24,44,56,79,86],"co-verification":[21],"hardware":[23],"software.":[25],"This":[26,48],"paper":[27],"focuses":[28],"comprehensive":[31],"analysis":[32,39,89],"framework":[33,49],"providing":[34],"platform":[35],"assembly":[36],"facilities,":[37],"system":[38],"tools,":[40],"enhanced":[41],"traffic":[42,91],"model":[43],"SystemC":[45],"TLM":[46],"IP.":[47],"has":[50],"intensively":[52],"used":[53],"to":[54,99],"analyze":[57],"complex":[58],"SOC":[59],"Interconnect":[60],"based":[61],"STBus":[63],"protocol":[64],"such":[65],"as":[66],"one":[68],"71xx":[70],"families.":[71],"By":[72],"hiding":[73],"complexity":[75],"simulation":[78,102],"filling":[80],"gap":[82],"towards":[83],"spreadsheet":[84],"study":[85],"costly":[87],"On-Chip":[88],"using":[90],"model,":[92],"benefit":[94],"from":[95],"an":[96,100],"easy":[97],"access":[98],"efficient":[101],"performance":[104],"evaluation.":[105]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
