{"id":"https://openalex.org/W2058777927","doi":"https://doi.org/10.1145/1289816.1289820","title":"Compiling code accelerators for FPGAs","display_name":"Compiling code accelerators for FPGAs","publication_year":2007,"publication_date":"2007-09-30","ids":{"openalex":"https://openalex.org/W2058777927","doi":"https://doi.org/10.1145/1289816.1289820","mag":"2058777927"},"language":"en","primary_location":{"id":"doi:10.1145/1289816.1289820","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1289816.1289820","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033921328","display_name":"Walid Najjar","orcid":"https://orcid.org/0000-0001-6761-6801"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Walid A. Najjar","raw_affiliation_strings":["U. California Riverside, Riverside, CA"],"affiliations":[{"raw_affiliation_string":"U. California Riverside, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5033921328"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.09265335,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"2","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9872999787330627,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8143032789230347},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7938973903656006},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5874106884002686},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.5662024021148682},{"id":"https://openalex.org/keywords/ranging","display_name":"Ranging","score":0.5152409672737122},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4337158501148224},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.42349785566329956},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4097013771533966},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3494020104408264},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2474704086780548},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08825662732124329}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8143032789230347},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7938973903656006},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5874106884002686},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.5662024021148682},{"id":"https://openalex.org/C115051666","wikidata":"https://www.wikidata.org/wiki/Q6522493","display_name":"Ranging","level":2,"score":0.5152409672737122},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4337158501148224},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.42349785566329956},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4097013771533966},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3494020104408264},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2474704086780548},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08825662732124329},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1289816.1289820","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1289816.1289820","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2783354812","https://openalex.org/W4384112194","https://openalex.org/W2058965144","https://openalex.org/W2103009189","https://openalex.org/W2164382479","https://openalex.org/W4312958259","https://openalex.org/W4308259661","https://openalex.org/W4390813131","https://openalex.org/W2349383066","https://openalex.org/W2778498407"],"abstract_inverted_index":{"This":[0],"tutorial":[1],"addresses":[2],"the":[3,61,82,129,140,184,187],"challenges":[4],"and":[5,25,34,53,72,115,168],"opportunities":[6],"presented":[7],"by":[8,125],"compiled":[9],"FPGA-based":[10],"code":[11,79,195],"accelerators.":[12],"In":[13],"recent":[14],"years":[15],"we":[16],"have":[17,57,74],"witnessed":[18],"a":[19,87,101,143,147],"fast":[20,47],"growth":[21],"of":[22,27,95,113,134,139,150,170],"both":[23],"size":[24,52,71],"speed":[26,54,73,84],"FPGAs.":[28],"These":[29],"had":[30],"been":[31,58,176],"initially":[32],"designed":[33],"marketed":[35],"as":[36,46,78,154],"convenient":[37],"devices":[38],"for":[39,60],"\"glue":[40],"logic.\"":[41],"Later,":[42],"they":[43,56,66],"became":[44],"used":[45,59],"prototyping":[48],"platforms.":[49],"As":[50],"their":[51,70,104],"grew,":[55],"short":[62],"time":[63],"to":[64,178,186],"market":[65],"can":[67,121],"afford.":[68],"Lately,":[69],"made":[75],"them":[76],"attractive":[77],"accelerator.":[80],"While":[81],"clock":[83],"achievable":[85],"on":[86,100,173,192],"typical":[88,102],"FPGA":[89],"design":[90],"is":[91],"about":[92],"an":[93],"order":[94],"magnitude":[96],"lower":[97],"than":[98],"that":[99],"CPU,":[103],"advantage":[105],"comes":[106],"from":[107,183],"two":[108],"sources:":[109],"(1)":[110],"Large":[111],"degree":[112],"instruction":[114],"loop":[116,161],"level":[117],"parallelism.":[118],"Parallel":[119],"loops":[120],"typically":[122],"be":[123],"unrolled":[124],"factors":[126],"ranging":[127,182],"in":[128,180],"100s.":[130],"(2)":[131],"Increased":[132],"efficiency":[133,167],"hardware":[135,171],"execution.":[136],"The":[137,164],"streaming":[138],"data":[141,155],"through":[142],"dedicated":[144],"circuit":[145],"eliminates":[146],"large":[148],"number":[149],"support":[151],"operations":[152],"such":[153],"fetch,":[156],"address":[157],"calculations,":[158],"index":[159],"management,":[160],"control,":[162],"etc.":[163],"combined":[165],"higher":[166],"parallelism":[169],"execution":[172],"FPGAs":[174],"has":[175],"shown":[177],"result":[179],"speedups":[181],"10s":[185],"1,000s":[188],"over":[189],"traditional":[190],"processor":[191],"frequently":[193],"executed":[194],"segments.":[196]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
