{"id":"https://openalex.org/W1978569607","doi":"https://doi.org/10.1145/1284480.1284559","title":"The interval page table","display_name":"The interval page table","publication_year":2007,"publication_date":"2007-09-03","ids":{"openalex":"https://openalex.org/W1978569607","doi":"https://doi.org/10.1145/1284480.1284559","mag":"1978569607"},"language":"en","primary_location":{"id":"doi:10.1145/1284480.1284559","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1284480.1284559","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th annual conference on Integrated circuits and systems design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102081079","display_name":"Xiangrong Zhou","orcid":null},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xiangrong Zhou","raw_affiliation_strings":["University of Maryland, College Park, MD"],"affiliations":[{"raw_affiliation_string":"University of Maryland, College Park, MD","institution_ids":["https://openalex.org/I66946132"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055465444","display_name":"\u041f. \u041f. \u041f\u0435\u0442\u0440\u043e\u0432","orcid":"https://orcid.org/0000-0001-5551-4963"},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Petrov","raw_affiliation_strings":["University of Maryland, College Park, MD"],"affiliations":[{"raw_affiliation_string":"University of Maryland, College Park, MD","institution_ids":["https://openalex.org/I66946132"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5102081079"],"corresponding_institution_ids":["https://openalex.org/I66946132"],"apc_list":null,"apc_paid":null,"fwci":0.3167,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.60403619,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"294","last_page":"299"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.83965003490448},{"id":"https://openalex.org/keywords/demand-paging","display_name":"Demand paging","score":0.8285608291625977},{"id":"https://openalex.org/keywords/page-fault","display_name":"Page fault","score":0.7442058324813843},{"id":"https://openalex.org/keywords/page","display_name":"Page","score":0.7389903664588928},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"Virtual memory","score":0.7307830452919006},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.7040748596191406},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.560934841632843},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.47190338373184204},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.4232966899871826},{"id":"https://openalex.org/keywords/thrashing","display_name":"Thrashing","score":0.42078274488449097},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4179571270942688},{"id":"https://openalex.org/keywords/tree-traversal","display_name":"Tree traversal","score":0.41454100608825684},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.2179529368877411},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.20274963974952698},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.13860252499580383},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.13385045528411865}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.83965003490448},{"id":"https://openalex.org/C188873839","wikidata":"https://www.wikidata.org/wiki/Q5255045","display_name":"Demand paging","level":5,"score":0.8285608291625977},{"id":"https://openalex.org/C193343404","wikidata":"https://www.wikidata.org/wiki/Q1928607","display_name":"Page fault","level":5,"score":0.7442058324813843},{"id":"https://openalex.org/C33925742","wikidata":"https://www.wikidata.org/wiki/Q361698","display_name":"Page","level":2,"score":0.7389903664588928},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.7307830452919006},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.7040748596191406},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.560934841632843},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.47190338373184204},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4232966899871826},{"id":"https://openalex.org/C28362024","wikidata":"https://www.wikidata.org/wiki/Q2067413","display_name":"Thrashing","level":2,"score":0.42078274488449097},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4179571270942688},{"id":"https://openalex.org/C140745168","wikidata":"https://www.wikidata.org/wiki/Q1210082","display_name":"Tree traversal","level":2,"score":0.41454100608825684},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.2179529368877411},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.20274963974952698},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.13860252499580383},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.13385045528411865}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1284480.1284559","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1284480.1284559","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th annual conference on Integrated circuits and systems design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2044206819","https://openalex.org/W2059457733","https://openalex.org/W2103356930","https://openalex.org/W2115283682","https://openalex.org/W2116699921","https://openalex.org/W2117285153","https://openalex.org/W2130179783","https://openalex.org/W2133408285","https://openalex.org/W2156003674","https://openalex.org/W2168013747","https://openalex.org/W2170756743","https://openalex.org/W2293221651","https://openalex.org/W6679594234"],"related_works":["https://openalex.org/W2168006845","https://openalex.org/W2017276153","https://openalex.org/W2139847837","https://openalex.org/W1993535731","https://openalex.org/W2900321452","https://openalex.org/W2142084235","https://openalex.org/W4232443537","https://openalex.org/W2059368477","https://openalex.org/W4237698627","https://openalex.org/W2034859281"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,42,108,128],"novel":[3],"page":[4,43,53,81,110,123,134],"table":[5,44,82,111,135],"organization":[6],"for":[7,62],"real-time":[8,69,95],"and":[9,68,131],"memory-constrained":[10],"embedded":[11,16,90],"systems.":[12],"Increasingly":[13],"many":[14],"high-end":[15],"processors":[17],"offer":[18],"virtual":[19,32,50],"memory":[20,33,100,119,146],"support":[21],"in":[22],"the":[23,36,49,77,86,121,145,149],"form":[24],"of":[25,74,80,148],"hardware":[26],"Memory":[27],"Management":[28],"Unit.":[29],"To":[30,102],"implement":[31],"support,":[34],"however,":[35,92],"system":[37],"software":[38],"needs":[39],"to":[40,51],"maintain":[41],"per":[45],"task,":[46],"which":[47,113],"captures":[48],"physical":[52],"translation":[54],"information.":[55],"Page":[56],"tables":[57],"have":[58,71],"been":[59,73,85],"traditionally":[60],"designed":[61],"general-purpose":[63],"systems":[64],"where":[65],"their":[66],"size":[67],"performance":[70,79],"not":[72,114],"primary":[75],"importance;":[76],"average":[78],"traversal":[83],"has":[84],"major":[87],"concern.":[88],"Many":[89],"systems,":[91],"impose":[93],"strict":[94],"requirements":[96],"coupled":[97],"with":[98],"limited":[99],"resources.":[101],"address":[103],"this":[104],"problem,":[105],"we":[106],"propose":[107],"new":[109],"organization,":[112],"only":[115],"requires":[116],"significantly":[117],"less":[118],"than":[120],"traditional":[122],"tables,":[124],"but":[125],"also":[126],"enables":[127],"very":[129],"fast":[130],"deterministic":[132],"hardware-based":[133],"lookup.":[136],"This":[137],"is":[138],"achieved":[139],"by":[140],"exploiting":[141],"application":[142],"knowledge":[143],"regarding":[144],"footprint":[147],"program":[150],"under":[151],"execution.":[152]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
