{"id":"https://openalex.org/W2070042721","doi":"https://doi.org/10.1145/1284480.1284510","title":"Cell placement on graphics processing units","display_name":"Cell placement on graphics processing units","publication_year":2007,"publication_date":"2007-09-03","ids":{"openalex":"https://openalex.org/W2070042721","doi":"https://doi.org/10.1145/1284480.1284510","mag":"2070042721"},"language":"en","primary_location":{"id":"doi:10.1145/1284480.1284510","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1284480.1284510","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th annual conference on Integrated circuits and systems design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009589391","display_name":"Guilherme Flach","orcid":"https://orcid.org/0000-0002-8192-2984"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Guilherme Flach","raw_affiliation_strings":["UFRGS, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111959821","display_name":"Marcelo Johann","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Marcelo Johann","raw_affiliation_strings":["UFRGS, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087624505","display_name":"Renato Hentschke","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Renato Hentschke","raw_affiliation_strings":["UFRGS, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108043721","display_name":"Ricardo Reis","orcid":"https://orcid.org/0000-0001-5781-5858"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ricardo Reis","raw_affiliation_strings":["UFRGS, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5009589391"],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.95,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.76488717,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.850639820098877},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.798967719078064},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream processing","score":0.6054762601852417},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5637701153755188},{"id":"https://openalex.org/keywords/graphics-processing-unit","display_name":"Graphics processing unit","score":0.540386974811554},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5295772552490234},{"id":"https://openalex.org/keywords/linear-algebra","display_name":"Linear algebra","score":0.504675030708313},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.5044878721237183},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.48788952827453613},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.43179571628570557},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36315709352493286},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.36218082904815674},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.227583646774292},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.16051644086837769},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12309223413467407}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.850639820098877},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.798967719078064},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.6054762601852417},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5637701153755188},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.540386974811554},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5295772552490234},{"id":"https://openalex.org/C139352143","wikidata":"https://www.wikidata.org/wiki/Q82571","display_name":"Linear algebra","level":2,"score":0.504675030708313},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.5044878721237183},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.48788952827453613},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.43179571628570557},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36315709352493286},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.36218082904815674},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.227583646774292},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.16051644086837769},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12309223413467407},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1284480.1284510","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1284480.1284510","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th annual conference on Integrated circuits and systems design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1560892771","https://openalex.org/W2032309817","https://openalex.org/W2038744183","https://openalex.org/W2098841537","https://openalex.org/W2100197617","https://openalex.org/W2145036657","https://openalex.org/W2154118576","https://openalex.org/W2157745962","https://openalex.org/W2163961680","https://openalex.org/W2997945685","https://openalex.org/W4235968347","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W1963859303","https://openalex.org/W2364044215","https://openalex.org/W2389600408","https://openalex.org/W240129890","https://openalex.org/W3048701459","https://openalex.org/W2149078538","https://openalex.org/W2080146221","https://openalex.org/W2370314112","https://openalex.org/W1912958759","https://openalex.org/W2792081825"],"abstract_inverted_index":{"Graphics":[0],"Processing":[1],"Units":[2],"(GPUs)":[3],"can":[4,12,23],"be":[5,13],"viewed":[6],"as":[7,41],"stream":[8],"processors":[9],"and,":[10],"therefore,":[11],"applied":[14,34],"to":[15,35,65,73],"improve":[16,74],"the":[17,67,75],"performance":[18,76],"of":[19,69,77,86],"data-parallel":[20],"algorithms.":[21],"GPUs":[22],"beat":[24],"CPUs":[25],"in":[26,38,63],"most":[27],"stream-like":[28],"algorithms":[29,89],"and":[30,44,49],"have":[31],"been":[32],"successfully":[33],"solve":[36],"problem":[37],"areas":[39],"such":[40],"biology,":[42],"audio":[43],"image":[45],"processing,":[46],"database":[47],"queries":[48],"others.":[50],"This":[51],"paper":[52],"presents":[53],"a":[54,61],"VLSI":[55],"cell":[56],"placement":[57],"tool":[58],"running":[59],"on":[60],"GPU":[62,84],"order":[64],"show":[66,82],"viability":[68],"applying":[70],"graphics":[71],"hardware":[72],"CAD":[78],"tools.":[79],"Our":[80],"results":[81],"that":[83],"versions":[85],"linear":[87],"algebra":[88],"run":[90],"3x":[91],"or":[92],"more":[93],"faster":[94],"than":[95],"CPU":[96],"versions.":[97]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}