{"id":"https://openalex.org/W2148741484","doi":"https://doi.org/10.1145/1283780.1283863","title":"On the latency, energy and area of checkpointed, superscalar register alias tables","display_name":"On the latency, energy and area of checkpointed, superscalar register alias tables","publication_year":2007,"publication_date":"2007-08-27","ids":{"openalex":"https://openalex.org/W2148741484","doi":"https://doi.org/10.1145/1283780.1283863","mag":"2148741484"},"language":"en","primary_location":{"id":"doi:10.1145/1283780.1283863","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1283780.1283863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2007 international symposium on Low power electronics and design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109241165","display_name":"Elham Safi","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Elham Safi","raw_affiliation_strings":["University of Toronto"],"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061522452","display_name":"Patrick Akl","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Patrick Akl","raw_affiliation_strings":["University of Toronto"],"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072544251","display_name":"Andreas Moshovos","orcid":"https://orcid.org/0000-0001-7768-367X"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Andreas Moshovos","raw_affiliation_strings":["University of Toronto"],"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009841786","display_name":"Andreas Veneris","orcid":"https://orcid.org/0000-0002-6309-8821"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Andreas Veneris","raw_affiliation_strings":["University of Toronto"],"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034758843","display_name":"A. Arapoyianni","orcid":null},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Aggeliki Arapoyianni","raw_affiliation_strings":["University of Athens"],"affiliations":[{"raw_affiliation_string":"University of Athens","institution_ids":["https://openalex.org/I200777214"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5109241165"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":1.9,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.86469828,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"379","last_page":"382"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/alias","display_name":"Alias","score":0.8070048093795776},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7991359233856201},{"id":"https://openalex.org/keywords/superscalar","display_name":"Superscalar","score":0.7818707823753357},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.729080319404602},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6943607330322266},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.5614756941795349},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48321521282196045},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.44555899500846863},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4164867401123047},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34315168857574463},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3342636227607727},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.1576014757156372},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.0919826328754425},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08341893553733826},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07661557197570801}],"concepts":[{"id":"https://openalex.org/C46681722","wikidata":"https://www.wikidata.org/wiki/Q4725589","display_name":"Alias","level":2,"score":0.8070048093795776},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7991359233856201},{"id":"https://openalex.org/C147101560","wikidata":"https://www.wikidata.org/wiki/Q1045706","display_name":"Superscalar","level":2,"score":0.7818707823753357},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.729080319404602},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6943607330322266},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.5614756941795349},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48321521282196045},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.44555899500846863},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4164867401123047},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34315168857574463},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3342636227607727},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.1576014757156372},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0919826328754425},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08341893553733826},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07661557197570801}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1283780.1283863","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1283780.1283863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2007 international symposium on Low power electronics and design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8100000023841858}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"},{"id":"https://openalex.org/F4320338080","display_name":"European Social Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1498071943","https://openalex.org/W1604047876","https://openalex.org/W1874263755","https://openalex.org/W1986907977","https://openalex.org/W2059052968","https://openalex.org/W2077398506","https://openalex.org/W2112833506","https://openalex.org/W2130838728","https://openalex.org/W2133809341","https://openalex.org/W2137156241","https://openalex.org/W2161864047","https://openalex.org/W2188360410","https://openalex.org/W4214692273","https://openalex.org/W4300119077"],"related_works":["https://openalex.org/W1521960115","https://openalex.org/W2367821391","https://openalex.org/W2048131019","https://openalex.org/W4253895162","https://openalex.org/W4251089459","https://openalex.org/W2090169195","https://openalex.org/W2230270457","https://openalex.org/W2111412181","https://openalex.org/W3088938565","https://openalex.org/W613182605"],"abstract_inverted_index":{"We":[0,72],"present":[1],"two":[2],"full-custom":[3],"implementations":[4,24],"of":[5,45,60,76,79,87,95,102],"the":[6,27,31,41,48,56,64,74,82,88,93,100],"Register":[7],"Alias":[8],"Table":[9],"(RAT)":[10],"for":[11],"a":[12,18],"4-way":[13],"superscalar":[14],"dynamically-scheduled":[15],"processor":[16],"in":[17,26],"commercial":[19],"130nm":[20],"CMOS":[21],"technology.":[22],"The":[23,90],"differ":[25],"way":[28],"they":[29],"organize":[30],"embedded":[32],"global":[33],"checkpoints":[34],"(GCs)":[35],"which":[36],"support":[37,92],"speculative":[38],"execution.":[39],"In":[40,55],"first":[42],"implementation,":[43,58],"representative":[44,59],"early":[46],"designs,":[47],"GCs":[49,65,80,103],"are":[50,66],"organized":[51,67],"as":[52,68],"shift":[53],"registers.":[54],"second":[57],"more":[61],"recent":[62,96],"proposals,":[63],"random":[69],"access":[70],"buffers.":[71],"measure":[73],"impact":[75],"increasing":[77],"thenumber":[78],"on":[81],"latency,":[83],"energy,":[84],"and":[85],"area":[86],"RAT.":[89],"results":[91],"importance":[94],"techniques":[97],"that":[98],"reduce":[99],"number":[101],"while":[104],"maintaining":[105],"performance.":[106]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}